The system model of embedded reconfigurable system is discussed firstly, followed by the construction of the soft- ware and hardware platform. Based on the platform, the function trait and control models of digital si...The system model of embedded reconfigurable system is discussed firstly, followed by the construction of the soft- ware and hardware platform. Based on the platform, the function trait and control models of digital signal processing tasks are described. According the functional unit model and control model, a software/hardware integrating model with dataflow control infrastructure is constructed. The software/hardware partition is carded out in the experiments of ultrasonic signal processing, and the results show that the system model is practicable.展开更多
An embedded system generally comprises gffour parts （embedded microprocessor unit, peripheral hardware equipment, embedded operating system, and user application）, and its core function is to complete the control of...An embedded system generally comprises gffour parts （embedded microprocessor unit, peripheral hardware equipment, embedded operating system, and user application）, and its core function is to complete the control of different equipments as well as necessary monitoring and management measures. Initialization is to set a variable as ＂default value＂, including system initialization, software initialization and hardware initialization. However, these three types of initialization are classified in accordance with different layers. This is studied in this paper.展开更多
In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware m...In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware multithread is discussed and a novel dynamic multithreaded architecture is proposed. The proposed architecture saves the energy wasted by removing idle threads without manipulation on the original architecture, fulfills a seamless switching mechanism which protects active threads and avoids pipeline stall during power mode switching. The report of an implemented dynamic multithreaded processor with 45 nm process from synthesis tool indicates that the area of dynamic multithreaded architecture is only 2.27% higher than the static one in achieving dynamic power dissipation, and consumes 1.3% more power in the same peak performance.展开更多
基金supported by the Research Project of “SUST Spring Bud”under contract number 2008BW2046 fron Shandong University of Science and Technology,China
文摘The system model of embedded reconfigurable system is discussed firstly, followed by the construction of the soft- ware and hardware platform. Based on the platform, the function trait and control models of digital signal processing tasks are described. According the functional unit model and control model, a software/hardware integrating model with dataflow control infrastructure is constructed. The software/hardware partition is carded out in the experiments of ultrasonic signal processing, and the results show that the system model is practicable.
文摘An embedded system generally comprises gffour parts （embedded microprocessor unit, peripheral hardware equipment, embedded operating system, and user application）, and its core function is to complete the control of different equipments as well as necessary monitoring and management measures. Initialization is to set a variable as ＂default value＂, including system initialization, software initialization and hardware initialization. However, these three types of initialization are classified in accordance with different layers. This is studied in this paper.
基金supported partially by the National High Technical Research and Development Program of China (863 Program) under Grants No. 2011AA040101, No. 2008AA01Z134the National Natural Science Foundation of China under Grants No. 61003251, No. 61172049, No. 61173150+2 种基金the Doctoral Fund of Ministry of Education of China under Grant No. 20100006110015Beijing Municipal Natural Science Foundation under Grant No. Z111100054011078the 2012 Ladder Plan Project of Beijing Key Laboratory of Knowledge Engineering for Materials Science under Grant No. Z121101002812005
文摘In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware multithread is discussed and a novel dynamic multithreaded architecture is proposed. The proposed architecture saves the energy wasted by removing idle threads without manipulation on the original architecture, fulfills a seamless switching mechanism which protects active threads and avoids pipeline stall during power mode switching. The report of an implemented dynamic multithreaded processor with 45 nm process from synthesis tool indicates that the area of dynamic multithreaded architecture is only 2.27% higher than the static one in achieving dynamic power dissipation, and consumes 1.3% more power in the same peak performance.
