Baseband ASIP designs for handsets are discussed based on the author's R&D backgrounds. Algorithms for 4G, 3G, and WLAN are analyzed and selected for implementation based on the trade off of cost and performan...Baseband ASIP designs for handsets are discussed based on the author's R&D backgrounds. Algorithms for 4G, 3G, and WLAN are analyzed and selected for implementation based on the trade off of cost and performance with power consumption in mind. A SDR ASIP baseband system architecture is proposed for 4G and 3G mobile handsets. Function partitions for heterogeneous symbol processors are introduced to get higher performance over cost. Three structures for DFE, FFE, and Matrix symbol ASIP are proposed. The concept of bit parallel processor is introduced. Challenges of baseband processors for UDN of 5G were briefly introduced. Conclusions on ASIP architecture and system design are given for different baseband processors on different products.展开更多
Stereo-electroencephalography （SEEG） is the main investigation method for pre-surgical evaluation of patients suffering from drug-resistant partial epilepsy. SEEG signals reflect two types of paroxysmal activity： i...Stereo-electroencephalography （SEEG） is the main investigation method for pre-surgical evaluation of patients suffering from drug-resistant partial epilepsy. SEEG signals reflect two types of paroxysmal activity： ictal activity and interictal activity or interictal spikes （IS）. The relationship between IS and ictal activity is an essential and recurrent question in epiletology. In this paper, we present a distributed and parallel architecture for space and temporal distribution analysis of IS, based on a distributed and collaborative methodology. The proposed approach exploits the SEEG data using vector analysis of the corresponding signals among multi-agents system. The objective is to present a new method to analyze and classify IS during wakefulness （W）, light sleep （LS） and deep sleep （DS） stages. Temporal and spatial relationships between IS and seizure onset zone are compared during wakefulness, light sleep and deep sleep. Results show that space and temporal distribution for real data are not random but correlated.展开更多
A parallel architecture for efficient hardware implementation of Rivest Shamir Adleman(RSA) cryptography is proposed.Residue number system(RNS) is introduced to realize high parallelism,thus all the elements under the...A parallel architecture for efficient hardware implementation of Rivest Shamir Adleman(RSA) cryptography is proposed.Residue number system(RNS) is introduced to realize high parallelism,thus all the elements under the same base are independent of each other and can be computed in parallel.Moreover,a simple and fast base transformation is used to achieve RNS Montgomery modular multiplication algorithm,which facilitates hardware implementation.Based on transport triggered architecture(TTA),the proposed architecture is designed to evaluate the performance and feasibility of the algorithm.With these optimizations,a decryption rate of 106 kbps can be achieved for 1 024-b RSA at the frequency of 100 MHz.展开更多
Spike neural networks are inspired by animal brains,and outperform traditional neural networks on complicated tasks.However,spike neural networks are usually used on a large scale,and they cannot be computed on commer...Spike neural networks are inspired by animal brains,and outperform traditional neural networks on complicated tasks.However,spike neural networks are usually used on a large scale,and they cannot be computed on commercial,off-the-shelf computers.A parallel architecture is proposed and developed for discrete-event simulations of spike neural networks.Furthermore,mechanisms for both parallelism degree estimation and dynamic load balance are emphasized with theoretical and computational analysis.Simulation results show the effectiveness of the proposed parallelized spike neural network system and its corresponding support components.展开更多
This article describes in detail a new method via the extension predictable algorithm of the matter-element model of parallel structure tuning the parameters of the extension PID controller. In comparison with fuzzy a...This article describes in detail a new method via the extension predictable algorithm of the matter-element model of parallel structure tuning the parameters of the extension PID controller. In comparison with fuzzy and extension PID controllers, the proposed extension PID predictable controller shows higher control gains when system states are away from equilibrium, and retains a lower profile of control signals at the same time. Consequently, better control performance is achieved. Through the proposed tuning formula, the weighting factors of an extension-logic predictable controller can be systematically selected according to the control plant. An experimental example through industrial field data and site engineers＇ experience demonstrates the superior performance of the proposed controller over the fuzzy controller.展开更多
基金supported by the National HighTech Research and Development Program of China (863 Program) 2014AA01A705.
文摘Baseband ASIP designs for handsets are discussed based on the author's R&D backgrounds. Algorithms for 4G, 3G, and WLAN are analyzed and selected for implementation based on the trade off of cost and performance with power consumption in mind. A SDR ASIP baseband system architecture is proposed for 4G and 3G mobile handsets. Function partitions for heterogeneous symbol processors are introduced to get higher performance over cost. Three structures for DFE, FFE, and Matrix symbol ASIP are proposed. The concept of bit parallel processor is introduced. Challenges of baseband processors for UDN of 5G were briefly introduced. Conclusions on ASIP architecture and system design are given for different baseband processors on different products.
文摘Stereo-electroencephalography （SEEG） is the main investigation method for pre-surgical evaluation of patients suffering from drug-resistant partial epilepsy. SEEG signals reflect two types of paroxysmal activity： ictal activity and interictal activity or interictal spikes （IS）. The relationship between IS and ictal activity is an essential and recurrent question in epiletology. In this paper, we present a distributed and parallel architecture for space and temporal distribution analysis of IS, based on a distributed and collaborative methodology. The proposed approach exploits the SEEG data using vector analysis of the corresponding signals among multi-agents system. The objective is to present a new method to analyze and classify IS during wakefulness （W）, light sleep （LS） and deep sleep （DS） stages. Temporal and spatial relationships between IS and seizure onset zone are compared during wakefulness, light sleep and deep sleep. Results show that space and temporal distribution for real data are not random but correlated.
基金Supported by the Natural Science Foundation of Tianjin (No. 11JCZDJC15800)the National Natural Science Foundation of China(No. 61003306)
文摘A parallel architecture for efficient hardware implementation of Rivest Shamir Adleman(RSA) cryptography is proposed.Residue number system(RNS) is introduced to realize high parallelism,thus all the elements under the same base are independent of each other and can be computed in parallel.Moreover,a simple and fast base transformation is used to achieve RNS Montgomery modular multiplication algorithm,which facilitates hardware implementation.Based on transport triggered architecture(TTA),the proposed architecture is designed to evaluate the performance and feasibility of the algorithm.With these optimizations,a decryption rate of 106 kbps can be achieved for 1 024-b RSA at the frequency of 100 MHz.
基金supported by the National Natural Science Foundation of China (Grant Nos. 61003082,60921062,61005077)
文摘Spike neural networks are inspired by animal brains,and outperform traditional neural networks on complicated tasks.However,spike neural networks are usually used on a large scale,and they cannot be computed on commercial,off-the-shelf computers.A parallel architecture is proposed and developed for discrete-event simulations of spike neural networks.Furthermore,mechanisms for both parallelism degree estimation and dynamic load balance are emphasized with theoretical and computational analysis.Simulation results show the effectiveness of the proposed parallelized spike neural network system and its corresponding support components.
基金This work is supported by Youth Foundation of University of Science and Techonology of China(No.KA0001).
文摘This article describes in detail a new method via the extension predictable algorithm of the matter-element model of parallel structure tuning the parameters of the extension PID controller. In comparison with fuzzy and extension PID controllers, the proposed extension PID predictable controller shows higher control gains when system states are away from equilibrium, and retains a lower profile of control signals at the same time. Consequently, better control performance is achieved. Through the proposed tuning formula, the weighting factors of an extension-logic predictable controller can be systematically selected according to the control plant. An experimental example through industrial field data and site engineers＇ experience demonstrates the superior performance of the proposed controller over the fuzzy controller.
