A study of the gate current variation is presented for various thickness ultrathin gate oxides ranging from 1.9 to 3.0nm under the constant voltage stress.The experimental results show the stress induced leakage curre...A study of the gate current variation is presented for various thickness ultrathin gate oxides ranging from 1.9 to 3.0nm under the constant voltage stress.The experimental results show the stress induced leakage current(SILC) includes two parts.One is due to the interface trap-assisted tunneling.The other is owing to the oxide trap-assisted tunneling.展开更多
文摘A study of the gate current variation is presented for various thickness ultrathin gate oxides ranging from 1.9 to 3.0nm under the constant voltage stress.The experimental results show the stress induced leakage current(SILC) includes two parts.One is due to the interface trap-assisted tunneling.The other is owing to the oxide trap-assisted tunneling.
