A fast motion estimation algorithm for variable block-size using the "line scan and block merge procedure" is proposed for airborne image compression modules.Full hardware implementation via FPGA is discusse...A fast motion estimation algorithm for variable block-size using the "line scan and block merge procedure" is proposed for airborne image compression modules.Full hardware implementation via FPGA is discussed in detail.The proposed pipelined architecture based on the line scan algorithm is capable of calculating the required 41 motion vectors of various size blocks supported by H.264 within a 16 X 16 block in parallel.An adaptive rate distortion cost function is used for various size block decision.The motion vectors of adjacent small blocks are merged to predict the motion vectors of larger blocks for reducing computation.Experimental results show that our proposed method has lower computational complexity than full search algorithm with slight quality decrease and little bit rate increase.Due to the high real-time processing speed it can be easily realized in hardware.展开更多
基金Supported by the Aviation Science Fund of China(2009ZC15001)
文摘A fast motion estimation algorithm for variable block-size using the "line scan and block merge procedure" is proposed for airborne image compression modules.Full hardware implementation via FPGA is discussed in detail.The proposed pipelined architecture based on the line scan algorithm is capable of calculating the required 41 motion vectors of various size blocks supported by H.264 within a 16 X 16 block in parallel.An adaptive rate distortion cost function is used for various size block decision.The motion vectors of adjacent small blocks are merged to predict the motion vectors of larger blocks for reducing computation.Experimental results show that our proposed method has lower computational complexity than full search algorithm with slight quality decrease and little bit rate increase.Due to the high real-time processing speed it can be easily realized in hardware.
