The design of a 2. 488 Gbit/s clock and data recovery （CDR） If for synchronous digital hierarchy （SDH） STM-16 receiver is described. Based on the injected phase-locked loop （IPLL） and D-flip flop architectures, ...The design of a 2. 488 Gbit/s clock and data recovery （CDR） If for synchronous digital hierarchy （SDH） STM-16 receiver is described. Based on the injected phase-locked loop （IPLL） and D-flip flop architectures, the CDR IC was implemented in a standard 0. 35 μan complementary metal-oxide-semiconductor （CMOS） technology. With 2^31 -1 pseudorandom bit sequences （PRBS） input, the sensitivity of data recovery circuit is less than 20 mV with 10^-12 bit error rate （BER）. The recovered clock shows a root mean square （rms） jitter of 2. 8 ps and a phase noise of - 110 dBc/Hz at 100 kHz offset. The capture range of the circuit is larger than 40 MHz. With a 5 V supply, the circuit consumes 680 mW and the chip area is 1.49 mm × 1 mm.展开更多
A 2.5Gb/s clock and data recovery （CDR） circuit is designed and realized in TSMC＇s standard 0.18/μm CMOS process. The clock recovery is based on a PLL. For phase noise optimization,a dynamic phase and frequency de...A 2.5Gb/s clock and data recovery （CDR） circuit is designed and realized in TSMC＇s standard 0.18/μm CMOS process. The clock recovery is based on a PLL. For phase noise optimization,a dynamic phase and frequency detector （PFD） is used in the PLL. The rms jitter of the recovered 2.5GHz clock is 2.4ps and the SSB phase noise is - 111dBc/Hz at 10kHz offset. The rms jitter of the recovered 2.5Gb/s data is 3.3ps. The power consumption is 120mW.展开更多
An asymmetry power clock,4 phase power clock supplying the power to the DSCRL(dual swing charge recovery logic) adiabatic circuit is presented.It is much simpler than the 6 phase power clock,symmetry power clock,us...An asymmetry power clock,4 phase power clock supplying the power to the DSCRL(dual swing charge recovery logic) adiabatic circuit is presented.It is much simpler than the 6 phase power clock,symmetry power clock,used in the DSCRL adiabatic circuit.Although the 4 phase power clock is simpler,the DSCRL adiabatic circuit still shows good performance and high efficiency of energy transfer and recovery.This conclusion has been proved by the result of the HSPICE simulation using the 0 6μm CMOS technology.展开更多
In order to make a 10 Gbit/s 2：1 half-rate multiplexer operate without external clocks, a 5 Gbit/s clock recovery （CR） circuit is needed to extract the desired clock from one input data. For the CR circuit, a 3-sta...In order to make a 10 Gbit/s 2：1 half-rate multiplexer operate without external clocks, a 5 Gbit/s clock recovery （CR） circuit is needed to extract the desired clock from one input data. For the CR circuit, a 3-stage ring voltage-controlled oscillator （VCO） is employed to avoid an unreliable startup of a 2-stage VCO and a low oscillation frequency of a 4-stage VCO. A phase frequency detector （PFD） is used to expand the pull-in range to meet the wide tuning range of a VCO required by process-voltage-temperature （PVT） variation. SMIC 0. 18-μm CMOS technology is adopted and the core area is 170 μm ×270 μm. Measurements show that, under a 1.8 V supply voltage, it consumes only about 90 mW, and has an input sensitivity of less than 25 mV, an output single-ended swing of above 300 mV, a phase noise of - 114 dBc/Hz at 1 MHz offset and a pull-in range of 1 GHz.展开更多
A 2.5Gb/s/ch data recovery （DR） circuit is designed for an SFI-5 interface. To make the parallel data bit-synchronization and reduce the bit error rate （BER） ,a delay locked loop （DLL） is used to place the cente...A 2.5Gb/s/ch data recovery （DR） circuit is designed for an SFI-5 interface. To make the parallel data bit-synchronization and reduce the bit error rate （BER） ,a delay locked loop （DLL） is used to place the center of the data eye exactly at the rising edge of the data-sampling clock. A single channel DR circuit was fabricated in TSMC＇s standard 0. 18μm CMOS process. The chip area is 0. 46mm^2. With a 2^32 - 1 pseudorandom bit sequence （PRBS） input,the RMS jitter of the recovered 2.5Gb/s data is 3.3ps. The sensitivity of the single channel DR is less than 20mV with 10-12 BER.展开更多
Oscillator IC technique is developed by combining injecting synchronization technique with a ring VCO.Using the technique,a novel 2 488GHz of monolithical integrated injected synchronized ring VCO (ISRVCO) is realize...Oscillator IC technique is developed by combining injecting synchronization technique with a ring VCO.Using the technique,a novel 2 488GHz of monolithical integrated injected synchronized ring VCO (ISRVCO) is realized in a standard 0 25μm CMOS process.The ISRVCO is characterized by the following performances: -100dBc /Hz@1MHz at free running frequency,-91 7dBc/Hz@10kHz when injection is locked.With the 3 3V of power supply,the tuning range is 150MHz and the locking range is 100MHz with 50m V p p signal injection.展开更多
A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock reco...A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock recovery method based on filter,and implements monolithic clock-recovery IC.The designed circuits include phase detector,voltage-controlled oscillator and loop filter.Among them,the voltage-control oscillator is a modified two-stage ring oscillator,which provides quadrature clock signals and presents wide voltage-controlled range and high voltage-controlling sensitivity.展开更多
A general research on chiral symmetry restoring phase transitions at zero temperature and finite chemical potentials under electrical neutrality condition has been conducted in a Nambu-Jona-Lasinio model to describe t...A general research on chiral symmetry restoring phase transitions at zero temperature and finite chemical potentials under electrical neutrality condition has been conducted in a Nambu-Jona-Lasinio model to describe twoflavor normal quark matter. Depending on whether mo/A, the ratio of dynamical quark mass in vacuum and the 3D momentum cutoff in the loop integrals, is less or greater than 0.413, the phase transition will be of the second or first order. A complete phase diagram of u quark chemical potential versus mo is given. With the electrical neutrality constraint, the region where the second order phase transition happens will be wider than the one without electrical neutrality limitation. The results also show that, for the value ofmo/A from QCD phenomenology, the phase transition must be of the first order.展开更多
The mechanisms responsible for deformation behavior in Nb/NiTi composite during pre-straining were investigated systematically using in-situ synchrotron X-ray diffraction, transmission electron microscopy and tensile ...The mechanisms responsible for deformation behavior in Nb/NiTi composite during pre-straining were investigated systematically using in-situ synchrotron X-ray diffraction, transmission electron microscopy and tensile test. It is shown that upon loading, the composite experiences elastic elongation and slight plastic deformation of B19′,B2 and β-Nb phases, together with the forward stress-induced martensitic(SIM) transformation from B2 to B19′. Upon unloading, the deformation mechanisms of the composite mainly involve elastic recovery of B19′, B2 and β-Nb phases,compression deformation of β-Nb phase and incomplete B19′→B2 reverse SIM transformation. In the tensile loading-unloading procedure, besides the inherent elastic deformation and SIM transformation, the(001) compound twins in B19′ martensite can also be conducive to the elastic deformation occurring in B19′-phase of the composite.Therefore, this composite can exhibit a large recoverable strain after unloading owing to the elastic deformation, and the partially reversible and consecutive SIM transformation together with the(001) compound twins.展开更多
This paper presents a novel scheme of high efficiency spreading spectrum modulation using double orthogonal complex sequences （DoCS）. In this scheme, input data bit-stream is split into many groups with length M. Ea...This paper presents a novel scheme of high efficiency spreading spectrum modulation using double orthogonal complex sequences （DoCS）. In this scheme, input data bit-stream is split into many groups with length M. Each group is then mapped into a word of width M and then utihzed to select one sequence from 2u-2 DoCS sequences each with length L. After that, the selected sequence is modulated on carrier in quadrature phase shift keying （QPSK） mode. In addition, a new method named forward phase correction （FPC） is put forward for carrier recovery. Theoretical analysis and bit-error-ratio（BER） experiment results indicate that the proposed scheme has better performance than the conventional direct sequence spread spectrum（DSSS） scheme both in bandwidth efficiency and processing gain of the receiver.展开更多
By means of critical behaviors of the dynamical fermion mass in four-fermion interaction models, we show by explicit calculations that when T = 0 the particle density will have a discontinuous jumping across the criti...By means of critical behaviors of the dynamical fermion mass in four-fermion interaction models, we show by explicit calculations that when T = 0 the particle density will have a discontinuous jumping across the critical chemical potential μ<SUB>c</SUB> in 2D and 3D Gross-Neveu (GN) model and these physically explain the first-order feature of the corresponding symmetry restoring phase transitions. For the second-order phase transitions in the 3D GN model when T → 0 and in 4D Nambu–Jona–Lasinio (NJL) model when T = 0, it is proven that the particle density itself will be continuous across μ<SUB>c</SUB> but its derivative over the chemical potential μ will have a discontinuous jumping. The results give a physical explanation of implications of the tricritical point in the 3D GN model. The discussions also show effectiveness of the critical analysis approach of phase transitions.展开更多
In order to study the soil enzyme content at the mine reclamation area and choose a tree species with superior restoration capabilities, this paper takes Huainan Datong Mine as the study area, and five different enzym...In order to study the soil enzyme content at the mine reclamation area and choose a tree species with superior restoration capabilities, this paper takes Huainan Datong Mine as the study area, and five different enzymes under nine tree species as the study subject. The different enzyme activity indexes were measured, and the correlation analysis and the principal component analysis （PCA） method were applied to evaluate and screen the tree species with advanced restoration. The results demonstrate that there are some correlations among the different soil enzymes, including some very significant positive correlations among urease, phosphatase, invertase and protease. The best species in terms of repair is privet, and the worst is Haltong. This study provides a scientific basis for the selection of restoration-capable tree species in the reclamation area of the coal mine.展开更多
Optical Time Division Multiplexing （OTDM） is known to be capable of transmitting single channel high bit rate data stream with low speed electro-optical components. A cost-effective, compact and stable short time wi...Optical Time Division Multiplexing （OTDM） is known to be capable of transmitting single channel high bit rate data stream with low speed electro-optical components. A cost-effective, compact and stable short time window with low insert loss, low phase noise, low timing-jitter and high speed performance is essential for ultra-high speed OTDM systems using phase and amplitude modulation formats. In this paper, we review three promising methods to obtain 40 GHz short time window including Electro-Absorption Modulator （EAM）, Dual-Parallel Mach-Zehnder Modulator （DPMZM） and Fiber Loop-Polarization Modulator （FL-PolM）. Sub-picosecond short pulse source generation, optical time division denlaltiplexing and clock recovery are realized respectively by using the short time window based on the three methods. By using DPMZM based pulse source and EAM based Clock Recovery （CR） and dermltiplexer, error free transmission of 640 Goit/s （160 Gbaud/s Pol-Mux DQPSK） single channel signal over 400 km single mode fiber is proven to be experimentally successful.展开更多
文摘The design of a 2. 488 Gbit/s clock and data recovery （CDR） If for synchronous digital hierarchy （SDH） STM-16 receiver is described. Based on the injected phase-locked loop （IPLL） and D-flip flop architectures, the CDR IC was implemented in a standard 0. 35 μan complementary metal-oxide-semiconductor （CMOS） technology. With 2^31 -1 pseudorandom bit sequences （PRBS） input, the sensitivity of data recovery circuit is less than 20 mV with 10^-12 bit error rate （BER）. The recovered clock shows a root mean square （rms） jitter of 2. 8 ps and a phase noise of - 110 dBc/Hz at 100 kHz offset. The capture range of the circuit is larger than 40 MHz. With a 5 V supply, the circuit consumes 680 mW and the chip area is 1.49 mm × 1 mm.
文摘A 2.5Gb/s clock and data recovery （CDR） circuit is designed and realized in TSMC＇s standard 0.18/μm CMOS process. The clock recovery is based on a PLL. For phase noise optimization,a dynamic phase and frequency detector （PFD） is used in the PLL. The rms jitter of the recovered 2.5GHz clock is 2.4ps and the SSB phase noise is - 111dBc/Hz at 10kHz offset. The rms jitter of the recovered 2.5Gb/s data is 3.3ps. The power consumption is 120mW.
文摘An asymmetry power clock,4 phase power clock supplying the power to the DSCRL(dual swing charge recovery logic) adiabatic circuit is presented.It is much simpler than the 6 phase power clock,symmetry power clock,used in the DSCRL adiabatic circuit.Although the 4 phase power clock is simpler,the DSCRL adiabatic circuit still shows good performance and high efficiency of energy transfer and recovery.This conclusion has been proved by the result of the HSPICE simulation using the 0 6μm CMOS technology.
基金The National High Technology Research and Development Program of China (863 Program)(No. 2007AA01Z2a5)the National Natural Science Foundation of China (No. 60806027,61076073)Specialized Research Fund for the Doctoral Program of Higher Education (No.20090092120012)
文摘In order to make a 10 Gbit/s 2：1 half-rate multiplexer operate without external clocks, a 5 Gbit/s clock recovery （CR） circuit is needed to extract the desired clock from one input data. For the CR circuit, a 3-stage ring voltage-controlled oscillator （VCO） is employed to avoid an unreliable startup of a 2-stage VCO and a low oscillation frequency of a 4-stage VCO. A phase frequency detector （PFD） is used to expand the pull-in range to meet the wide tuning range of a VCO required by process-voltage-temperature （PVT） variation. SMIC 0. 18-μm CMOS technology is adopted and the core area is 170 μm ×270 μm. Measurements show that, under a 1.8 V supply voltage, it consumes only about 90 mW, and has an input sensitivity of less than 25 mV, an output single-ended swing of above 300 mV, a phase noise of - 114 dBc/Hz at 1 MHz offset and a pull-in range of 1 GHz.
文摘A 2.5Gb/s/ch data recovery （DR） circuit is designed for an SFI-5 interface. To make the parallel data bit-synchronization and reduce the bit error rate （BER） ,a delay locked loop （DLL） is used to place the center of the data eye exactly at the rising edge of the data-sampling clock. A single channel DR circuit was fabricated in TSMC＇s standard 0. 18μm CMOS process. The chip area is 0. 46mm^2. With a 2^32 - 1 pseudorandom bit sequence （PRBS） input,the RMS jitter of the recovered 2.5Gb/s data is 3.3ps. The sensitivity of the single channel DR is less than 20mV with 10-12 BER.
文摘Oscillator IC technique is developed by combining injecting synchronization technique with a ring VCO.Using the technique,a novel 2 488GHz of monolithical integrated injected synchronized ring VCO (ISRVCO) is realized in a standard 0 25μm CMOS process.The ISRVCO is characterized by the following performances: -100dBc /Hz@1MHz at free running frequency,-91 7dBc/Hz@10kHz when injection is locked.With the 3 3V of power supply,the tuning range is 150MHz and the locking range is 100MHz with 50m V p p signal injection.
文摘A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock recovery method based on filter,and implements monolithic clock-recovery IC.The designed circuits include phase detector,voltage-controlled oscillator and loop filter.Among them,the voltage-control oscillator is a modified two-stage ring oscillator,which provides quadrature clock signals and presents wide voltage-controlled range and high voltage-controlling sensitivity.
基金The project supported by National Natural Science Foundation of China under Grant No. 10475113
文摘A general research on chiral symmetry restoring phase transitions at zero temperature and finite chemical potentials under electrical neutrality condition has been conducted in a Nambu-Jona-Lasinio model to describe twoflavor normal quark matter. Depending on whether mo/A, the ratio of dynamical quark mass in vacuum and the 3D momentum cutoff in the loop integrals, is less or greater than 0.413, the phase transition will be of the second or first order. A complete phase diagram of u quark chemical potential versus mo is given. With the electrical neutrality constraint, the region where the second order phase transition happens will be wider than the one without electrical neutrality limitation. The results also show that, for the value ofmo/A from QCD phenomenology, the phase transition must be of the first order.
基金the National Natural Science Foundation of China (Nos.51771082,51971009,52175410,51801076)the Six Talent Peaks Project in Jiangsu Province,China (No.2019-XCL-113)+2 种基金Zhenjiang Science & Technology Program,China (No.GY2020001)Project of Faculty of Agricultural Equipment of Jiangsu University,China (No.NZXB20200101)the US Department of Energy,Office of Science and Office of Basic Energy Science (No.DE-AC02-06CH11357) for providing the Advanced Photon Source。
文摘The mechanisms responsible for deformation behavior in Nb/NiTi composite during pre-straining were investigated systematically using in-situ synchrotron X-ray diffraction, transmission electron microscopy and tensile test. It is shown that upon loading, the composite experiences elastic elongation and slight plastic deformation of B19′,B2 and β-Nb phases, together with the forward stress-induced martensitic(SIM) transformation from B2 to B19′. Upon unloading, the deformation mechanisms of the composite mainly involve elastic recovery of B19′, B2 and β-Nb phases,compression deformation of β-Nb phase and incomplete B19′→B2 reverse SIM transformation. In the tensile loading-unloading procedure, besides the inherent elastic deformation and SIM transformation, the(001) compound twins in B19′ martensite can also be conducive to the elastic deformation occurring in B19′-phase of the composite.Therefore, this composite can exhibit a large recoverable strain after unloading owing to the elastic deformation, and the partially reversible and consecutive SIM transformation together with the(001) compound twins.
基金Union Innovation Found of Jiangsu Province(No. BY2009149)
文摘This paper presents a novel scheme of high efficiency spreading spectrum modulation using double orthogonal complex sequences （DoCS）. In this scheme, input data bit-stream is split into many groups with length M. Each group is then mapped into a word of width M and then utihzed to select one sequence from 2u-2 DoCS sequences each with length L. After that, the selected sequence is modulated on carrier in quadrature phase shift keying （QPSK） mode. In addition, a new method named forward phase correction （FPC） is put forward for carrier recovery. Theoretical analysis and bit-error-ratio（BER） experiment results indicate that the proposed scheme has better performance than the conventional direct sequence spread spectrum（DSSS） scheme both in bandwidth efficiency and processing gain of the receiver.
基金The project supported by National Natural Science Foundation ot China
文摘By means of critical behaviors of the dynamical fermion mass in four-fermion interaction models, we show by explicit calculations that when T = 0 the particle density will have a discontinuous jumping across the critical chemical potential μ<SUB>c</SUB> in 2D and 3D Gross-Neveu (GN) model and these physically explain the first-order feature of the corresponding symmetry restoring phase transitions. For the second-order phase transitions in the 3D GN model when T → 0 and in 4D Nambu–Jona–Lasinio (NJL) model when T = 0, it is proven that the particle density itself will be continuous across μ<SUB>c</SUB> but its derivative over the chemical potential μ will have a discontinuous jumping. The results give a physical explanation of implications of the tricritical point in the 3D GN model. The discussions also show effectiveness of the critical analysis approach of phase transitions.
文摘In order to study the soil enzyme content at the mine reclamation area and choose a tree species with superior restoration capabilities, this paper takes Huainan Datong Mine as the study area, and five different enzymes under nine tree species as the study subject. The different enzyme activity indexes were measured, and the correlation analysis and the principal component analysis （PCA） method were applied to evaluate and screen the tree species with advanced restoration. The results demonstrate that there are some correlations among the different soil enzymes, including some very significant positive correlations among urease, phosphatase, invertase and protease. The best species in terms of repair is privet, and the worst is Haltong. This study provides a scientific basis for the selection of restoration-capable tree species in the reclamation area of the coal mine.
基金Acknowledgements This paper was partially supported by the Hi-Tech Research andDevelopment Program of China under Grant No. 2012AA011303 the National Natural Science Foundation of China under Crants No. 61001121, No. 60932004, No. 61006041+1 种基金 the National Key Basic Research Program of China under Grant No. 2011CB301702 the Fundamental Research Funds for the Central Universities.
文摘Optical Time Division Multiplexing （OTDM） is known to be capable of transmitting single channel high bit rate data stream with low speed electro-optical components. A cost-effective, compact and stable short time window with low insert loss, low phase noise, low timing-jitter and high speed performance is essential for ultra-high speed OTDM systems using phase and amplitude modulation formats. In this paper, we review three promising methods to obtain 40 GHz short time window including Electro-Absorption Modulator （EAM）, Dual-Parallel Mach-Zehnder Modulator （DPMZM） and Fiber Loop-Polarization Modulator （FL-PolM）. Sub-picosecond short pulse source generation, optical time division denlaltiplexing and clock recovery are realized respectively by using the short time window based on the three methods. By using DPMZM based pulse source and EAM based Clock Recovery （CR） and dermltiplexer, error free transmission of 640 Goit/s （160 Gbaud/s Pol-Mux DQPSK） single channel signal over 400 km single mode fiber is proven to be experimentally successful.
