Principle and Analysis of Novel Gate-Induced Noise in Pixel MOSFET of CMOS Imagers

A detailed principle and a rigorous analysis of a new noise,the gate-induced noise,in pixel MOSFET of CMOS imagers are provided.The gate-induced noise of the MOSFET is more notable in the strong reversion region than that in the subthreshold region when the applied gate voltage is low.However,the applied gate voltage being up to 3V,the gate-induced noise is more notable with the ω/ω T increasing when the MOSFET operates in the subthreshold region than that in the strong reversion region.Between the photocurrent I D and the root mean square value of the gated-induced noise,current i 2 d presents the relation of i 2 d∝I D in the saturation region of the strong reversion and approximately i 2 d∝I D in the subthreshold region.A deta iled and rigorous study of the gate-induced noise in the reset MOSFET for the p hotodiode APS and improved photodiode APS are provided.The improvement of logari thmic response APS is analyzed and the simulation results show that the gate-in duced noise can be reduced.

A Systematical Approach for Noise in CMOS LNA

A systematic approach is used to analyze the noise in CMOS low noise amplifier(LNA),including channel noise and induced gate noise in MOS devices.A new analytical formula for noise figure is proposed.Based on this formula,the impacts of distributed gate resistance and intrinsic channel resistance on noise performance are discussed.Two kinds of noise optimization approaches are performed and applied to the design of a 5 2GHz CMOS LNA.