A 37. 5 MHz differential complementary metal oxide semiconductor （CMOS） crystal oscillator with low power and low phase noise for the radio frequency tuner of digital radio broadcasting digital radio mondiale （DRAM...A 37. 5 MHz differential complementary metal oxide semiconductor （CMOS） crystal oscillator with low power and low phase noise for the radio frequency tuner of digital radio broadcasting digital radio mondiale （DRAM） and digital audio broadcasting （DAB） systems is realized and characterized. The conventional cross-coupled n-type metal oxide semiconductor （NMOS） transistors are replaced by p-type metal oxide semiconductor （PMOS） transistors to decrease the phase noise in the core part of the crystal oscillator. A symmetry structure of the current mirror is adopted to increase the stability of direct current. The amplitude detecting circuit made up of a single- stage CMOS operational transconductance amplifier （OTA） and a simple amplitude detector is used to improve the current accuracy of the output signals. The chip is fabricated in a 0. 18- pxn CMOS process, and the total chip size is 0. 35 mm x 0. 3 mm. Under a supply voltage of 1.8 V, the measured power consumption is 3.6 mW including the output buffer for 50 testing loads. The proposed crystal oscillator exhibits a low phase noise of - 134. 7 dBc/Hz at 1-kHz offset from the center frequency of 37. 5 MHz.展开更多
A design and implementation for a 2.4GHz quadrature output frequency synthesizer intended for bluetooth in 0. 35μm CMOS technology are presented. A differentially controlled quadrature voltage-controlled oscillator ...A design and implementation for a 2.4GHz quadrature output frequency synthesizer intended for bluetooth in 0. 35μm CMOS technology are presented. A differentially controlled quadrature voltage-controlled oscillator （QVCO） is employed to generate quadrature （I/Q） signals. A second-order loop filter, with a unit gain transconductance amplifier having the performance of a third-order loop filter,is exploited for low cost. The measured spot phase noise is -106.15dBc/Hz@ 1MHz. Close-in phase noise is less than -70dBc/Hz. The synthesizer consumes 13.5mA under a 3.3V voltage supply. The core size is 1.3mm×0. 8mm.展开更多
A wideband LC cross-coupled voltage controlled oscillator（VCO） is designed and realized with standard 0. 18 μm complementary metal-oxide-semiconductor（CMOS） technology. Band switching capacitors are adopted to ex...A wideband LC cross-coupled voltage controlled oscillator（VCO） is designed and realized with standard 0. 18 μm complementary metal-oxide-semiconductor（CMOS） technology. Band switching capacitors are adopted to extend the frequency tuning range, and the phase noise is optimized in the design procedure. The functional relationships between the phase noise and the transistors＇ width-length ratios are deduced by a linear time variant （LTV） model. The theoretical optimized parameter value ranges are determined. To simplify the calculation, the working region is split into several sub-ranges according to transistor working conditions. Thus, a lot of integrations are avoided, and the phase noise function upon the design variables can be expressed as simple proportion formats. Test results show that the DC current is 8.8 mA under a voltage supply of 1.8 V; the frequency range is 1.17 to 1.90 GHz, and the phase noise reaches - 83 dBc/Hz at a 10 kHz offset from the carrier. The chip size is 1. 2 mm × 0. 9 mm.展开更多
基金The National Natural Science Foundation of China(No. 61106024)the Specialized Research Fund for the Doctoral Program of Higher Education (No. 20090092120012)the Science and Technology Program of South east University (No. KJ2010402)
文摘A 37. 5 MHz differential complementary metal oxide semiconductor （CMOS） crystal oscillator with low power and low phase noise for the radio frequency tuner of digital radio broadcasting digital radio mondiale （DRAM） and digital audio broadcasting （DAB） systems is realized and characterized. The conventional cross-coupled n-type metal oxide semiconductor （NMOS） transistors are replaced by p-type metal oxide semiconductor （PMOS） transistors to decrease the phase noise in the core part of the crystal oscillator. A symmetry structure of the current mirror is adopted to increase the stability of direct current. The amplitude detecting circuit made up of a single- stage CMOS operational transconductance amplifier （OTA） and a simple amplitude detector is used to improve the current accuracy of the output signals. The chip is fabricated in a 0. 18- pxn CMOS process, and the total chip size is 0. 35 mm x 0. 3 mm. Under a supply voltage of 1.8 V, the measured power consumption is 3.6 mW including the output buffer for 50 testing loads. The proposed crystal oscillator exhibits a low phase noise of - 134. 7 dBc/Hz at 1-kHz offset from the center frequency of 37. 5 MHz.
文摘A design and implementation for a 2.4GHz quadrature output frequency synthesizer intended for bluetooth in 0. 35μm CMOS technology are presented. A differentially controlled quadrature voltage-controlled oscillator （QVCO） is employed to generate quadrature （I/Q） signals. A second-order loop filter, with a unit gain transconductance amplifier having the performance of a third-order loop filter,is exploited for low cost. The measured spot phase noise is -106.15dBc/Hz@ 1MHz. Close-in phase noise is less than -70dBc/Hz. The synthesizer consumes 13.5mA under a 3.3V voltage supply. The core size is 1.3mm×0. 8mm.
文摘A wideband LC cross-coupled voltage controlled oscillator（VCO） is designed and realized with standard 0. 18 μm complementary metal-oxide-semiconductor（CMOS） technology. Band switching capacitors are adopted to extend the frequency tuning range, and the phase noise is optimized in the design procedure. The functional relationships between the phase noise and the transistors＇ width-length ratios are deduced by a linear time variant （LTV） model. The theoretical optimized parameter value ranges are determined. To simplify the calculation, the working region is split into several sub-ranges according to transistor working conditions. Thus, a lot of integrations are avoided, and the phase noise function upon the design variables can be expressed as simple proportion formats. Test results show that the DC current is 8.8 mA under a voltage supply of 1.8 V; the frequency range is 1.17 to 1.90 GHz, and the phase noise reaches - 83 dBc/Hz at a 10 kHz offset from the carrier. The chip size is 1. 2 mm × 0. 9 mm.
