On the basis of EST (Equivalent STate hashing) algorithm, this paper researches a kind of test generation algorithm based on search state dominance for combinational circuit. According to the dominance relation of the...On the basis of EST (Equivalent STate hashing) algorithm, this paper researches a kind of test generation algorithm based on search state dominance for combinational circuit. According to the dominance relation of the E-frontier (evaluation frontier), we can prove that this algorithm can terminate unnecessary searching step of test pattern earlier than the EST algorithm through some examples, so this algorithm can reduce the time of test generation. The test patterns calculated can detect faults given through simulation.展开更多
This paper proposes a circuit structure which can be used for both synchronous and asynchronous pipeline control. It is a self-circulation structure with embedded delay network, and a pipeline can be controlled by thi...This paper proposes a circuit structure which can be used for both synchronous and asynchronous pipeline control. It is a self-circulation structure with embedded delay network, and a pipeline can be controlled by this structure with the interconnection of adjacent stages. This paper first proposes a basic circuit structure, then a linear pipeline is designed with self-circulation structure. The performance of linear pipeline is analyzed, and a 16-bit digital signal processor (DSP) with the structure is designed to prove the validity of the structure. Results show that about 10%-15% power consumption is saved with self-circulation structure compared with synchronous counterpart, while almost the same performance is achieved.展开更多
文摘On the basis of EST (Equivalent STate hashing) algorithm, this paper researches a kind of test generation algorithm based on search state dominance for combinational circuit. According to the dominance relation of the E-frontier (evaluation frontier), we can prove that this algorithm can terminate unnecessary searching step of test pattern earlier than the EST algorithm through some examples, so this algorithm can reduce the time of test generation. The test patterns calculated can detect faults given through simulation.
基金Sponsored by the National High Technology Research and Development Program of China(Grant No.2003AA1Z1350)
文摘This paper proposes a circuit structure which can be used for both synchronous and asynchronous pipeline control. It is a self-circulation structure with embedded delay network, and a pipeline can be controlled by this structure with the interconnection of adjacent stages. This paper first proposes a basic circuit structure, then a linear pipeline is designed with self-circulation structure. The performance of linear pipeline is analyzed, and a 16-bit digital signal processor (DSP) with the structure is designed to prove the validity of the structure. Results show that about 10%-15% power consumption is saved with self-circulation structure compared with synchronous counterpart, while almost the same performance is achieved.
