The design and implementation of a CMOS LC VCO with 3. 2-6. 1GHz tuning range are presented. This is achieved by enhancing the tuning capability of the binary-weighted band-switching MIM capacitor. The circuit has bee...The design and implementation of a CMOS LC VCO with 3. 2-6. 1GHz tuning range are presented. This is achieved by enhancing the tuning capability of the binary-weighted band-switching MIM capacitor. The circuit has been implemented in a 0. 18μm RF/Mixed-Signal CMOS process. The measured phase noise is - 101.67dBc/Hz at 1MHz offset from a 5.5GHz carrier,and the VCO core draws 9.69mA current from a 1.8V supply.展开更多
A wideband LC cross-coupled voltage controlled oscillator（VCO） is designed and realized with standard 0. 18 μm complementary metal-oxide-semiconductor（CMOS） technology. Band switching capacitors are adopted to ex...A wideband LC cross-coupled voltage controlled oscillator（VCO） is designed and realized with standard 0. 18 μm complementary metal-oxide-semiconductor（CMOS） technology. Band switching capacitors are adopted to extend the frequency tuning range, and the phase noise is optimized in the design procedure. The functional relationships between the phase noise and the transistors＇ width-length ratios are deduced by a linear time variant （LTV） model. The theoretical optimized parameter value ranges are determined. To simplify the calculation, the working region is split into several sub-ranges according to transistor working conditions. Thus, a lot of integrations are avoided, and the phase noise function upon the design variables can be expressed as simple proportion formats. Test results show that the DC current is 8.8 mA under a voltage supply of 1.8 V; the frequency range is 1.17 to 1.90 GHz, and the phase noise reaches - 83 dBc/Hz at a 10 kHz offset from the carrier. The chip size is 1. 2 mm × 0. 9 mm.展开更多
This paper presents a VHF CMOS VCO. The most significant improvement on the VCO is that the cross-coupled MOSFET pairs are divided into several switchable parts so the characteristics can compensate the state change t...This paper presents a VHF CMOS VCO. The most significant improvement on the VCO is that the cross-coupled MOSFET pairs are divided into several switchable parts so the characteristics can compensate the state change that results from the frequency tuning of the oscillator. This VCO is implemented in 0, 18μm CMOS with a core area of about 550μm × 700μm. The test results show that the tuning range covers 31-111MHz with a power consumption between 0.3-6. 9mW and a phase noise at a 100kHz offset of about - 110dBc/Hz.展开更多
This paper proposes a family of PWM modulation strategies for boostfull-bridge (FB) converters. The modulation strategies can be classified into two kinds according tothe turn-on sequence of the diagonal switches. The...This paper proposes a family of PWM modulation strategies for boostfull-bridge (FB) converters. The modulation strategies can be classified into two kinds according tothe turn-on sequence of the diagonal switches. The concept of leading switches and lagging switchesis introduced to realize soft-switching. According to the soft-switching realized by the leadingswitches and the lagging switches, two kinds of soft-switching techniques for PWM boost FBconverters yield: zero-current-switching (ZCS) and zero-current and zero-voltage-switching (ZCZVS).Simulation results verify the analysis.展开更多
The conventional inverters have the shortcomings of straightway conduction in transistors and the difficulty of realizing soft swit￣ching. A novel inverter based on the DC/DC converter topology is presented. The inve...The conventional inverters have the shortcomings of straightway conduction in transistors and the difficulty of realizing soft swit￣ching. A novel inverter based on the DC/DC converter topology is presented. The inverter is comprised of a combined Buck/Boost DC/DC converter and a bridge circuit. The front stage converter is controlled to output variable DC voltage and the bridge circuit is used to convert the DC voltage to AC output. The energy feedback technology and one circle control scheme are used t...展开更多
This paper describes a wideband low phase noise frequency synthesizer.It operates in the multi-band including digital radio mondiale DRM digital audio broadcasting DAB amplitude modulation AM and frequency modulation ...This paper describes a wideband low phase noise frequency synthesizer.It operates in the multi-band including digital radio mondiale DRM digital audio broadcasting DAB amplitude modulation AM and frequency modulation FM .In order to cover the signals of the overall frequencies a novel frequency planning and a new structure are proposed. A wide-band low-phase-noise low-power voltage-control oscillator VCO and a high speed wide band high frequency division ratio pulse swallow frequency divider with a low power consumption are presented.The monolithic DRM/DAB/AM/FM frequency synthesizer chip is also fabricated in a SMIC＇s 0.18-μm CMOS process.The die area is 1 425 μm ×795 μm including the test buffer and pads. The measured results show that the VCO operating frequency range is from 2.22 to 3.57 GHz the measured phase noise of the VCO is 120.22 dBc/Hz at 1 MHz offset the pulse swallow frequency divider operation frequency is from 0.9 to 3.4 GHz.The phase noise in the phase-locked loop PLL is-59.52 dBc/Hz at 10 kHz offset and fits for the demand of the DRM/DAB/AM/FM RF front-end. The proposed frequency synthesizer consumes 47 mW including test buffer under a 1.8 V supply.展开更多
The bit error rate （BER） performance of multi-user direct spreading bi-phase shift keying （DSBPSK） direct impulse ultra wideband （UWB） systems is analyzed and simulated based on a statistical indoor multi-path f...The bit error rate （BER） performance of multi-user direct spreading bi-phase shift keying （DSBPSK） direct impulse ultra wideband （UWB） systems is analyzed and simulated based on a statistical indoor multi-path fading channel model. The BER of the system is theoretically derived and given in closed form, which is expressed in terms of channel parameters and system parameters such as pulse width parameter, pulse repeat period, user number and pulse waveform. With this BER expression, the effect of these parameters on the system performance can be evaluated in a uniform way. Simulation results well match the theory numerical results, and prove that the multi-access interference （MAI） of DS-BPSK UWB is a normal distribution.展开更多
The highly nonlinear behavior of the system limits the performance of classical linear proportional and integral （PI） controllers used for hot rolling. An active disturbance rejection controller is proposed in this ...The highly nonlinear behavior of the system limits the performance of classical linear proportional and integral （PI） controllers used for hot rolling. An active disturbance rejection controller is proposed in this paper to deal with the nonlinear problem of hydraulic servo system in order to preserve last response and small overshoot of control system. The active disturbance rejection （ADR） controller is composed of nonlinear tracking differentiator （TD）, extended state observer （ESO） and nonlinear feedback （NF） law. An example of the hydraulic edger system case study is investigated to show the effectiveness and robustness of the proposed nonlinear controller, especially, in the circumstance of foreign disturbance and working condition variation, compared with classic PI controller.展开更多
Existing solutions against wiretapping attacks for network coding either bring significant bandwidth overhead or incur a high computational complexity.In order to reduce the security overhead of the existing solutions...Existing solutions against wiretapping attacks for network coding either bring significant bandwidth overhead or incur a high computational complexity.In order to reduce the security overhead of the existing solutions for securing network coding,a novel securing network coding paradigm is presented relying on two coding models:intra-generation coding and inter-generation coding.The basic idea to secure network coding using intra-generation coding is to limit the encryption operations for each generation,and then subject the scrambled and the remaining original source vectors to a linear transformation.This method is then generalized seamlessly using inter-generation coding by further exploiting the algebraic structure of network coding.We show that the proposed schemes have properties of low-complexity security,little bandwidth consumption,and high efficiency in integrating with the existing security techniques effectively.展开更多
The dilemma of the quantization parameter (QP) being involved in both rate control and rate-distortion optimization (RDO) prevents using the traditional rate control scheme. Although some rate control schemes are prop...The dilemma of the quantization parameter (QP) being involved in both rate control and rate-distortion optimization (RDO) prevents using the traditional rate control scheme. Although some rate control schemes are proposed to circumvent the dilemma, the inaccurate prediction model and improper bit allocation deter H.264 application on low bandwidth channel. To resolve this issue, this paper proposes a novel rate control scheme by considering the macroblock (MB) encoding complexity variation and buffer variation and by exploiting the spatio-temporal correlation sufficiently well. Simulations showed that this scheme improves the perceptual quality of the pictures with similar or smaller PSNR deviations when compared to that of rate control in JVT-O016.展开更多
A new dimmer using a mental-oxide-semiconductor field-effect transistor (MOSFET) for alternating-current (AC) directly driven light-emitting-diode (LED) lamp was presented. The control method of proposed dimmer is pul...A new dimmer using a mental-oxide-semiconductor field-effect transistor (MOSFET) for alternating-current (AC) directly driven light-emitting-diode (LED) lamp was presented. The control method of proposed dimmer is pulse width control (PWM) method. Compared with the conventional phase-controlled dimmer, the proposed PWM dimmer can produce sine wave and did not cause harmonics problem. Furthermore, the proposed control method did not amplify the light flicker due to the independence of input voltage. Therefore, the PWM dimmer can be used as the dimmer of the AC LED lamp instead of the conventional phase-controlled dimmer. The experimental result shows that the proposed PWM dimmer has good performances.展开更多
The network resource allocation in SDN for control applications is becoming a key problem in the near future because of the conflict between the need of the flow-level flexibility control and the limited capacity of f...The network resource allocation in SDN for control applications is becoming a key problem in the near future because of the conflict between the need of the flow-level flexibility control and the limited capacity of flow table.Based on the analysis of the difference of the definition of network resource between SDN and traditional IP network,the idea of the integrated allocation of link bandwidth and flow table for multiple control applications in SDN is proposed in this paper.Furthermore,a price-based joint allocation model of network resource in SDN is built by introducing the price for each of the resources,which can get the proportional fair allocation of link bandwidth and the minimum global delay at the same time.We have also designed a popular flow scheduling policy based on the proportional fair allocation of link bandwidth in order to achieve the minimum global delay.A flow scheduling module has been implemented and evaluated in Floodlight,named virtual forwarding space(VFS).VFS can not only implement the fair allocation of link bandwidth and minimum delay flow scheduling in data plane but also accelerate packet forwarding by looking up control rules in control plane.展开更多
文摘The design and implementation of a CMOS LC VCO with 3. 2-6. 1GHz tuning range are presented. This is achieved by enhancing the tuning capability of the binary-weighted band-switching MIM capacitor. The circuit has been implemented in a 0. 18μm RF/Mixed-Signal CMOS process. The measured phase noise is - 101.67dBc/Hz at 1MHz offset from a 5.5GHz carrier,and the VCO core draws 9.69mA current from a 1.8V supply.
文摘A wideband LC cross-coupled voltage controlled oscillator（VCO） is designed and realized with standard 0. 18 μm complementary metal-oxide-semiconductor（CMOS） technology. Band switching capacitors are adopted to extend the frequency tuning range, and the phase noise is optimized in the design procedure. The functional relationships between the phase noise and the transistors＇ width-length ratios are deduced by a linear time variant （LTV） model. The theoretical optimized parameter value ranges are determined. To simplify the calculation, the working region is split into several sub-ranges according to transistor working conditions. Thus, a lot of integrations are avoided, and the phase noise function upon the design variables can be expressed as simple proportion formats. Test results show that the DC current is 8.8 mA under a voltage supply of 1.8 V; the frequency range is 1.17 to 1.90 GHz, and the phase noise reaches - 83 dBc/Hz at a 10 kHz offset from the carrier. The chip size is 1. 2 mm × 0. 9 mm.
文摘This paper presents a VHF CMOS VCO. The most significant improvement on the VCO is that the cross-coupled MOSFET pairs are divided into several switchable parts so the characteristics can compensate the state change that results from the frequency tuning of the oscillator. This VCO is implemented in 0, 18μm CMOS with a core area of about 550μm × 700μm. The test results show that the tuning range covers 31-111MHz with a power consumption between 0.3-6. 9mW and a phase noise at a 100kHz offset of about - 110dBc/Hz.
文摘This paper proposes a family of PWM modulation strategies for boostfull-bridge (FB) converters. The modulation strategies can be classified into two kinds according tothe turn-on sequence of the diagonal switches. The concept of leading switches and lagging switchesis introduced to realize soft-switching. According to the soft-switching realized by the leadingswitches and the lagging switches, two kinds of soft-switching techniques for PWM boost FBconverters yield: zero-current-switching (ZCS) and zero-current and zero-voltage-switching (ZCZVS).Simulation results verify the analysis.
文摘The conventional inverters have the shortcomings of straightway conduction in transistors and the difficulty of realizing soft swit￣ching. A novel inverter based on the DC/DC converter topology is presented. The inverter is comprised of a combined Buck/Boost DC/DC converter and a bridge circuit. The front stage converter is controlled to output variable DC voltage and the bridge circuit is used to convert the DC voltage to AC output. The energy feedback technology and one circle control scheme are used t...
基金The Research Project of Science and Technology at the University of Inner Mongolia Autonomous Region(No.NJZY11016)the Innovation Fund of the Ministry of Science and Technology for Small and Medium Sized Enterprises of China(No.11C26213211234)
文摘This paper describes a wideband low phase noise frequency synthesizer.It operates in the multi-band including digital radio mondiale DRM digital audio broadcasting DAB amplitude modulation AM and frequency modulation FM .In order to cover the signals of the overall frequencies a novel frequency planning and a new structure are proposed. A wide-band low-phase-noise low-power voltage-control oscillator VCO and a high speed wide band high frequency division ratio pulse swallow frequency divider with a low power consumption are presented.The monolithic DRM/DAB/AM/FM frequency synthesizer chip is also fabricated in a SMIC＇s 0.18-μm CMOS process.The die area is 1 425 μm ×795 μm including the test buffer and pads. The measured results show that the VCO operating frequency range is from 2.22 to 3.57 GHz the measured phase noise of the VCO is 120.22 dBc/Hz at 1 MHz offset the pulse swallow frequency divider operation frequency is from 0.9 to 3.4 GHz.The phase noise in the phase-locked loop PLL is-59.52 dBc/Hz at 10 kHz offset and fits for the demand of the DRM/DAB/AM/FM RF front-end. The proposed frequency synthesizer consumes 47 mW including test buffer under a 1.8 V supply.
基金The National High Technology Research and Deve-lopment Program of China (863Program) (Nos.2001AA123042,2003AA123330,2005AA123320).
文摘The bit error rate （BER） performance of multi-user direct spreading bi-phase shift keying （DSBPSK） direct impulse ultra wideband （UWB） systems is analyzed and simulated based on a statistical indoor multi-path fading channel model. The BER of the system is theoretically derived and given in closed form, which is expressed in terms of channel parameters and system parameters such as pulse width parameter, pulse repeat period, user number and pulse waveform. With this BER expression, the effect of these parameters on the system performance can be evaluated in a uniform way. Simulation results well match the theory numerical results, and prove that the multi-access interference （MAI） of DS-BPSK UWB is a normal distribution.
基金Project supported by the National Basic Research Program (973) of China (No. 2006CB705400)the National Natural Science Foun- dation of China (No. 50575200)
文摘The highly nonlinear behavior of the system limits the performance of classical linear proportional and integral （PI） controllers used for hot rolling. An active disturbance rejection controller is proposed in this paper to deal with the nonlinear problem of hydraulic servo system in order to preserve last response and small overshoot of control system. The active disturbance rejection （ADR） controller is composed of nonlinear tracking differentiator （TD）, extended state observer （ESO） and nonlinear feedback （NF） law. An example of the hydraulic edger system case study is investigated to show the effectiveness and robustness of the proposed nonlinear controller, especially, in the circumstance of foreign disturbance and working condition variation, compared with classic PI controller.
基金supported by the National Natural Science Foundation of China(Grant No.11371290,No.61271174,No. 61301178)the Science and Technology Innovation Foundation of Xi'an(Grant No. CXY1352WL28)
文摘Existing solutions against wiretapping attacks for network coding either bring significant bandwidth overhead or incur a high computational complexity.In order to reduce the security overhead of the existing solutions for securing network coding,a novel securing network coding paradigm is presented relying on two coding models:intra-generation coding and inter-generation coding.The basic idea to secure network coding using intra-generation coding is to limit the encryption operations for each generation,and then subject the scrambled and the remaining original source vectors to a linear transformation.This method is then generalized seamlessly using inter-generation coding by further exploiting the algebraic structure of network coding.We show that the proposed schemes have properties of low-complexity security,little bandwidth consumption,and high efficiency in integrating with the existing security techniques effectively.
文摘The dilemma of the quantization parameter (QP) being involved in both rate control and rate-distortion optimization (RDO) prevents using the traditional rate control scheme. Although some rate control schemes are proposed to circumvent the dilemma, the inaccurate prediction model and improper bit allocation deter H.264 application on low bandwidth channel. To resolve this issue, this paper proposes a novel rate control scheme by considering the macroblock (MB) encoding complexity variation and buffer variation and by exploiting the spatio-temporal correlation sufficiently well. Simulations showed that this scheme improves the perceptual quality of the pictures with similar or smaller PSNR deviations when compared to that of rate control in JVT-O016.
文摘A new dimmer using a mental-oxide-semiconductor field-effect transistor (MOSFET) for alternating-current (AC) directly driven light-emitting-diode (LED) lamp was presented. The control method of proposed dimmer is pulse width control (PWM) method. Compared with the conventional phase-controlled dimmer, the proposed PWM dimmer can produce sine wave and did not cause harmonics problem. Furthermore, the proposed control method did not amplify the light flicker due to the independence of input voltage. Therefore, the PWM dimmer can be used as the dimmer of the AC LED lamp instead of the conventional phase-controlled dimmer. The experimental result shows that the proposed PWM dimmer has good performances.
基金Supported by the National High-tech R&D Program("863" Program) of China (No.2013AA013505)the National Science Foundation of China(No.61472213)National Research Foundation of Korea(NRF 2014K1A1A2064649)
文摘The network resource allocation in SDN for control applications is becoming a key problem in the near future because of the conflict between the need of the flow-level flexibility control and the limited capacity of flow table.Based on the analysis of the difference of the definition of network resource between SDN and traditional IP network,the idea of the integrated allocation of link bandwidth and flow table for multiple control applications in SDN is proposed in this paper.Furthermore,a price-based joint allocation model of network resource in SDN is built by introducing the price for each of the resources,which can get the proportional fair allocation of link bandwidth and the minimum global delay at the same time.We have also designed a popular flow scheduling policy based on the proportional fair allocation of link bandwidth in order to achieve the minimum global delay.A flow scheduling module has been implemented and evaluated in Floodlight,named virtual forwarding space(VFS).VFS can not only implement the fair allocation of link bandwidth and minimum delay flow scheduling in data plane but also accelerate packet forwarding by looking up control rules in control plane.
