绝缘导线放线器在电气安装中的应用

目前,在建筑工程中电气安装通常使用3相5线供电,在穿线工程施工时需同时放出多卷导线,既耗费人工、工时,又不能保证放出的导线顺直且不出现扭结现象。针对以上问题,通过反复试验,制作了一种简单、经久耐用、操作简便、便于携带的绝缘导线放线器,该放线器能同时放出多卷导线,又能保证放出的导线质量,放线时只需2人操作,既节省人工,又可提高放线速度。

电驱动线缆越障放线器的研制

在电力通信光缆建设过程中,光缆跨越放线是难度较高的一项工作,其中牵引放线是工作的难点,传统的人工放线在工作中会给工作人员带来安全风险且效率底成本高,研制新型放线器成了必然的趋势。本文详细介绍了电驱动线缆越障放线器研制内容,利用滑轮、电动机、蓄电池及无线遥控装置等常用的器件,通过无线遥控控制,通过电动牵引的方式实现光缆跨越放线。

微型海光缆水下高速布放研究

提出了将微型海光缆用于海上作业平台大容量通信的临时通信线路的思想,设计了一种可控的微型海光缆水下被动式高速放线器,对用该放线器水下放线时微型海光缆的受力状态和位置信息进行了计算机模拟仿真,仿真结果为下一步海上放线试验提供了理论参考.

All-Optical Sampling Using Nonlinear Polarization Rotation in a Single Semiconductor Optical Amplifier

We propose a novel all-optical sampling method using nonlinear polarization rotation in a semiconductor optical amplifier. A rate-equation model capable of describing the all-optical sampling mechanism is presented in this paper. Based on this model, we investigate the optimized operating parameters of the proposed system by simulating the output intensity of the probe light as functions of the input polarization angle, the phase induced by the polarization controller, and the ori- entation of the polarization beam splitter. The simulated results show that we can obtain a good linear slope and a large linear dynamic range,which is suitable for all-optical sampling. The operating power of the pump light can be less than lmW. The presented all-optical sampling method can potentially operate at a sampling rate up to hundreds GS/s and needs low optical power.

Design and Fabrication of Power Si_(1-x)Ge_x/Si Heterojunction Bipolar Transistor for Wireless Power Amplifier Applications

A multi-finger structure power SiGe HBT device （with an emitter area of about 166μm^2） is fabricated with very simple 2μm double-mesa technology. The DC current gain β is 144.25. The B-C junction breakdown voltage reaches 9V with a collector doping concentration of 1 × 10^17cm^-3 and a collector thickness of 400nm. Though our data are influenced by large additional RF probe pads, the device exhibits a maximum oscillation frequency fmax of 10.1GHz and a cut-off frequency fτ of 1.8GHz at a DC bias point of IC=10mA and VCE = 2.5V.

Design of Low-Voltage Low Noise Amplifiers with High Linearity

A CMOS radio frequency low noise amplifier with high linearity and low operation voltage of less than 1.0V is presented.In this circuit,an auxiliary MOSFET in the triode region is used to boost the linearity.Simulation shows that this method can boost the input-referred 3rd-order intercept point with much less power dissipation than that of traditional power/linearity tradeoff solution which pays at least 1dB power for 1dB linearity improvement.It is also shown that the size of the common-gate PMOS transistor needs to be optimized to reduce its loaded input impedance so as not to degrade the linearity due to high voltage gain at its source terminal.The simulation is carried out with TSMC 0.18μm RF CMOS technology and SpectreRF.

High performance differential CMOS LNA design for low-IF GPS receiver

A 1.575 GHz CMOS （complementary metal-oxidesemiconductor transistor） low noise amplifier（LNA） suitable for a low intermediate frequency（IF） global positioning system（GPS） receiver is presented. Considering parasitic effects resulting from bond pad and input electrostatic discharge （ESD） protection diodes, the optimization of the input matching and noise performance is analyzed, and a narrowband inductor model is applied to the circuit design and optimization. Based on the Volterra series, the nonlinearity of the LNA is analyzed and an equation describing input-referred third-order intercept points （IIP3） which indicate the nonlinearity effects is derived; accordingly, the trade-off between the power consumption and linearity is made. The LNA is designed and simulated with TSMC （Taiwan Semiconductor Manufacturing Company） 0. 18 μm radio frequency （RF）technology. Simulation results show that the LNA has a noise figure of only 1.1 dB, - 8. 3 dBm IIP3 with 3 mA current consumption from a 1.8 V voltage supply, and the input impedances match well.

A Wide-Band Low Noise Amplifier for Terrestrial and Cable Receptions

We present the design of a wide-band low-noise amplifier （LNA） implemented in 0.35μm SiGe BiCMOS technology for cable and terrestrial tuner applications. The LNA utilizes current injection to achieve high linearity. Without using inductors, the LNA achieves 0.1 ～ 1GHz wide bandwidth and 18. 8dB gain with less than 1.4dB of gain variation. The noise figure of the wideband LNA is 5dB, and its 1dB compression point is - 2dBm and IIP3 is 8dBm. The LNA dissipates 120mW of power with a 5V supply.

An 85mW 14-bit 150MS/s Pipelined ADC with a Merged First and Second MDAC

A low-power 14-bit 150MS/s an- alog-to-digital converter （ADC） is present- ed for communication applications. Range scaling enables a maximal 2-Vp-p input with a single-stage opamp adopted. Opamp and capacitor sharing between the first multi- plying digital-to-analog converter （MDAC） and the second one reduces the total opamp power further. The dedicated sample-and- hold amplifier （SHA） is removed to lower the power and the noise. The blind calibration of linearity errors is proposed to improve the per- formance. The prototype ADC is fabricated in a 130rim CMOS process with a 1.3-V supply voltage. The SNDR of the ADC is 71.3 dB with a 2.4 MHz input and remains 68.5 dB for a 120 MHz input. It consumes 85 roW, which includes 57 mW for the ADC core, 11 mW for the low jitter clock receiver and 17 mW for the high-speed reference buffer.

130 nm CMOS Multi-Stage Synthetic Transmission Line Based Amplifier Beyond 100 GHz

A 130 nm CMOS complementary-conducting-strip transmission line(CCS-TL)based multi-stage amplifier beyond 100 GHz was presented in this paper. Different structural parameters were investigated to achieve higher quality factor for the matching circuits. Moreover, CCS-TL based Marchand balun was implemented to achieve higher output power. The measured small signal gain was higher than 5 d B from 101 GHz to 110 GHz. DC power consumption was 67.2 mW with V_D=1.2 V, and the chip size including contact PADs was 1.12 mm×0.81 mm.

Measurement of linewidth enhancement factor of SOA using fiber Sagnac Ring

Semiconductor optical amplifiers (SOA) are optical amplifying devices and key parts in optical switches and optical buffers.They are largely used in communication system.Linewidth enhancement factor is an important parameter for SOA.A method is proposed to measure the linewidth enhancement factor with Sagnac interferometer.Cross phase modulation (XPM) and cross gain modulation (XGM) coexist in SOA.The quantitative relation of linewidth enhancement factor to XGM and the interference extinction ratio is given.The experimental results indicate that the value of linewidth enhancement factor changes from 5.13 to 6.24 when the electric current varies from 130 mA to 240 mA.

PCCP broken wire detection based on orthogonal electromagnetic principle

Aiming at the major failure mode of prestressed concrete cylinder pipes (PCCP),namely the fracture of prestressed steel wires,the broken wire detection technology based on orthogonal electromagnetic principle is studied. The detection system model is established and optimized by using COMSOL finite element simulation software. Furthermore,the theoretical analysis of the wire-breaking effect is carried out. The influence of factors on broken wire signal characteristics such as edge effect,circumferential relative position of the detector and broken wires,excitation frequency and relative permeability of steel wires is analyzed,which provides a theoretical guidance for the field detection. The influence of the steel cylinder structure on the simulation results is analyzed,which provides a reference for the improvement of calculation efficiency. The corresponding detection system is designed and implemented. Concretely,a high-voltage and high-power sinusoidal signal coil drive scheme based on sinusoidal pulse width modulation technology and an intelligent power module is innovatively proposed and the corresponding protection circuit is designed. The broken wire signal could be effectively extracted through a lock-in amplifier. The experimental results show that this system can effectively identify the broken wires with low cost.

Noise and linearity optimization methods for a 1.9GHz low noise amplifier

Noise and linearity performances are critical characteristics for radio frequency integrated circuits (RFICs), especially for low noise amplifiers (LNAs). In this paper, a detailed analysis of noise and linearity for the cascode architecture, a widely used circuit structure in LNA designs, is presented. The noise and the linearity improvement techniques for cascode structures are also developed and have been proven by computer simulating experiments. Theoretical analysis and simulation results showed that, for cascode structure LNAs, the first metallic oxide semiconductor field effect transistor (MOSFET) dominates the noise performance of the LNA, while the second MOSFET contributes more to the linearity. A conclusion is thus obtained that the first and second MOSFET of the LNA can be designed to optimize the noise performance and the linearity performance separately, without trade offs. The 1.9GHz Complementary Metal Oxide Semiconductor (CMOS) LNA simulation results are also given as an application of the developed theory.

Nonlinear Liquid Crystal Optical Signal Amplifiers

The principle, structure and system of nonlinear liquid crystal optical signal amplifiers are described. Experimental results are theoretically analysed for optical signal amplifers. It shows that this type of the optical signal amplifiers are comprised of liquid crystal light sensitive medium which can receive a modulated signal optic wave and a pump wave, and can be applied to optical transmission systems.

Double Clad Er-doped Fiber Amplifier

Presented is a theoretical study of double-clad Er-doped fiber power amplifier(EDFA). Two kinds of double clad fibers(DCF) with rectangular and "flower" inner clad shapes are studied, and these fibers have different coupling constants and propagation losses. We calculate the effective pump power absorption ratio along the fiber with different coupling constants from the first cladding to the doped core and with different propagation losses for the power in the inner cladding. Then the gains of the double clad Er-doped fiber amplifiers versus fiber lengths are calculated using the EDFA model based on propagation and rate equations of a homogeneous, two-level medium.

A PHEMT Based Wideband LNA for Wireless Applications

This work is about the development of a super low noise amplifier with minimum power consumption and high gain for several wireless applications.The amplifier operates at frequency bands of 0.9-2.4 GHz and can be used in many applications like Wireless local area network(WLAN),WiFi,Bluetooth,ZigBee and Global System for mobile communications(GSM).This new design can be employed for the IEEE 802.15.4 standard in industrial,scientific and medical(ISM) Band.The enhancement mode pseudomorphic high electron mobility transistor PHEMT is used here due to its high linearity,better performance and less noisy operation.The common source inductive degeneration method is employed here to enhance the gain of amplifier.The amplifier produces a gain of more than 17 dB and noise figure of about 0.5 dB.The lower values of S11 and S22 reflect the accuracy of impedance matching network placed at the input and output sides of amplifier.Agilent Advance Design System(ADS) is used for the design and simulation purpose.Further the layout of design is developed on the FR4 substrate.

Design of Photoelectric Detection Circuit in Linear Measuring System

The structure,equivalent circuit,noise sources of silicon photodiode are analyzed.In order to improve the measuring linearity,we must choose the silicon photodiode with a large R d,small R s and I 0 and under an operation state of output short-circuit.We must let the operation amplifier work in the current-voltage transfer form.Also we analyzed the effects of the input noise voltage,the input noise current,the input offset voltage,the input offset current of the operation amplifier and the noises of the silicon photodiode on the combined circuit of the operation amplifier with the silicon photodiode.Considering these factors,we can design the detective circuit with high response,sensitivity,stability,linearity and SNR .

A novel portable transmitter with 8 dBm output power for wireless communication equipments

In this paper,a portable 2.42 GHz transmitter for wireless communication systems,with 8dBm output power and small size is proposed.Several novel features exist in this transmitter.First,power consumption and output are balanced by introducing a differential oscillator with input signal controlled biasing,which acts as both a carrier generator and an OOK modulator.Then,power consumption of the transmitter is reduced by the OOK modulated signal via switching the oscillator and the power amplifier at the same time.Furthermore,the area size is also reduced by a class-AB power amplifier,which uses the PCB antenna as the resonance inductance.With these features,the total chip area is reduced to 670μm×740μm(In a 0.18μm CMOS process).

Design of Pipelined ADC Using Op Amp Sharing Technique

This paper presents a 10-bit 20 MS/s pipelined Analog-to- Digital Converter（ADC） using op amp sharing approach and removing Sample and Hold Amplifier（SHA） or SHA-less technique to reach the goal of low-power constanpfion. This design was fabricated in TSMC 0.18 wn 1P6M technology. Measurement results show at supply voltage of 1.8 V, a SFDR of 42.46 dB, a SNDR of 39.45 dB, an ENOB of 6.26, and a THDof41.82 dB are at 1 MHz sinusoidal sig- nal input. In addition, the DNL and INL are 1.4 LSB and 3.23 LSB respectively. The power onstmaption is 28.8 mW. The core area is 0.595 mm2 and the chip area including pads is 1.468 mm2.

Study on Volterra-Laguerre behavioral model for RF power amplifier

Voherra series behavioral model for radio frequency （RF） power amplifier （PA） has been widely used in system-level simulation, however, high computational complexity makes this kind of model limited to ＂weak＂ nonlinearity. In order to reduce the computational complexity and the number of coefficients of Volterra series kernels, a Volterra series improved behavioral model based on Laguerre orthogonal polynomials function, namely Voherra-Laguerre behavioral model, is proposed. Mathematical expressions of Volterra-Laguerre behavioral model is derived, and accuracy of the model is verified through comparison of measured and simulation output data from a freescale PA using MRF21030 transistor. Mathematical analysis and simulation results show that Voherra-Laguerre behavioral model has a simple structure, much less coefficients and better modeling performance than general Volterra series model. The model can be used more correctly for system-level simulation of RF PA with wideband signal.