高精度D／A转换器及其应用

介绍ＭＡＸ５０１（５０２）／Ａ转换器的原理，典型工作电路，实际应用线路和全用注意事项。

200Ms/s 177mW 8bit Folding and Interpolating CMOS A/D Converter

A CMOS folding and interpolating analog-to-digital converter (ADC) for embedded application is described.The circuit is fully compatible with standard digital CMOS technology.A modified folding block implemented without resistor contributes to a small chip area.At the input stage,offset averaging reduces the input capacitance and the distributed track-and-hold circuits are proposed to improve signal-to-noise-plus-distortion ratio.The 200Ms/s 8bit ADC with 177mW total power consumption at 3.3V power supply is realized in standard digital 0.18μm 3.3V CMOS technology.

Numerical study of effect of front cavity on hydrogen/air premixed combustion in a micro-combustion chamber

The micro-combustion chamber is the key component for micro-TPV systems. To improve the combustor wall temperature level and its uniformity and efficiency, an improved flat micro-combustor with a front cavity is built, and the combustion performance of the original and improved combustors of premixed H2/air flames under various inlet velocities and equivalence ratios is numerically investigated. The effects of the front cavity height and length on the outer wall temperature and efficiency are also discussed. The front cavity significantly improves the average outer wall temperature, outer wall temperature uniformity, and combustion efficiency of the micro-combustor, increases the area of the high temperature zone, and enhances the heat transfer between the burned blends and inner walls. The micro-combustor with the front cavity length of 2.0 mm and height of 0.5 mm is suitable for micro-TPV system application due to the relatively high outer wall temperature, combustion efficiency, and the most uniform outer wall temperature.

Asymptotic Analysis for Low-Resolution Massive MIMO Systems with MMSE Receiver

The uplink achievable rate of massive multiple-input-multiple-output(MIMO) systems, where the low-resolution analog-to-digital converters(ADCs) are assumed to equip at the base station(BS), is investigated in this paper. We assume that only imperfect channel station information is known at the BS. Then a new MMSE receiver is designed by taking not only the Gaussian noise, but also the channel estimation error and quantizer noise into account. By using the Stieltjes transform of random matrix, we further derive a tight asymptotic equivalent for the uplink achievable rate with proposed MMSE receiver. We present a detailed analysis for the number of BS antennas through the expression of the achievable rates and validate the results using numerical simulations. It is also shown that we can compensate the performance loss due to the low-resolution quantization by increasing the number of antennas at the BS.

Mathematical model of convection diathermanous coefficient of refrigerator car

It is analyzed that the influence factors on temperature field of refrigerator car. The mathematical model of convection diathermanous coefficient has been put forward. It is considered in the model that the parameters of wind speed , car speed , temperature of car surface , temperature of surroundings , etc. If the boundary conditions and parameters used in calculation model of convection transmits heat coefficient are confinned as following： the cold plank car velocity Vis 120 km/h, and air temperature is 25 ℃, and the atmosphere press is 1013250 Pa, and wind velocity Viis 10 m/s, and the length of car bodywork Lis 5 m, and bodywork surface temperature is 25 ℃. The results were obtained by the model： when the wind velocity direction is the same as car velocity, the coefficient Kof convection transmits heat is 51.4（W· m^-2· K^-1 ）, and when the wind velocity direction is against the car velocity, K is 90.58 （W ·m^-2· K^-1）.

High Speed Column-Parallel CDS/ADC Circuit with Nonlinearity Compensation for CMOS Image Sensors

A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.

Design of Pipelined ADC Using Op Amp Sharing Technique

This paper presents a 10-bit 20 MS/s pipelined Analog-to- Digital Converter（ADC） using op amp sharing approach and removing Sample and Hold Amplifier（SHA） or SHA-less technique to reach the goal of low-power constanpfion. This design was fabricated in TSMC 0.18 wn 1P6M technology. Measurement results show at supply voltage of 1.8 V, a SFDR of 42.46 dB, a SNDR of 39.45 dB, an ENOB of 6.26, and a THDof41.82 dB are at 1 MHz sinusoidal sig- nal input. In addition, the DNL and INL are 1.4 LSB and 3.23 LSB respectively. The power onstmaption is 28.8 mW. The core area is 0.595 mm2 and the chip area including pads is 1.468 mm2.

Feedback Filtering for Digital Control Applications

Thanks to the progress in semiconductor technologies, today microcontrollers offer huge computational power. That allows using advanced control algorithms with a built-in intelligence with a sufficient speed, for many demanding applications. These capabilities make the embedded control ideal for using at complex plants and for obtaining the highest performance in a wide area of operations. However, control performance also strongly depends on the feedback. A short latency and a high precision of embedded analog peripherals allow building fast and accurate control loops. The paper proposes an easy design method of high performance analog to digital converter filtering path, optimized for control applications.

The Practical Design Aspects of Anti-aliasing Filters for the Multirate Analog-to-digital Processing in Microcontroller Embedded System

Due to the widespread computer technology, it is difficult to imagine a research or a control of any physical object without using a powerful hardware and software applications. To use digital technologies we need to collect data of a real world in digital system by the analog-to-digital converters. Taking into account the relative high computational capabilities of modern microcontrollers the article proposes a multirate processing system. The paper presents practical design aspects of the analog and digital anti-aliasing filter fbr the measurement path. having regarded the real possibilities and limitations of today＇s filters and analog-to-digital embedded converters.

High-resolution data acquisition technique in broadband seismic observation systems

The dynamic range of the currently most widely used 24-bit seismic data acquisition devices is 10–20 d B lower than that of broadband seismometers, and this can affect the completeness of seismic waveform recordings under certain conditions. However, this problem is not easy to solve because of the lack of analog to digital converter(ADC) chips with more than 24 bits in the market. In this paper, we propose a method in which an adder, an integrator, a digital to analog converter chip, a field-programmable gate array, and an existing low-resolution ADC chip are used to build a third-order 16-bit oversampling delta-sigma modulator. This modulator is equipped with a digital decimation filter, thus facilitating higher resolution and larger dynamic range seismic data acquisition. Experimental results show that, within the 0.1–40 Hz frequency range, the circuit board's dynamic range reaches 158.2 d B, its resolution reaches 25.99 bits, and its linearity error is below 2.5 ppm, which is better than what is achieved by the commercial 24-bit ADC chips ADS1281 and CS5371. This demonstrates that the proposed method may alleviate or even completely resolve the amplitude-limitation problem that so commonly occurs with broadband observation instruments during strong earthquakes.

Acoustic Goos-H?nchen effect

We report two models of the lateral displacement of acoustic-wave scattering on a fluid-solid interface that reveal an acoustic analog of the Goos-Hainchen effect in optics. This acoustic analog is called the acoustic Goos-Hainchen effect. Using newly proposed models, we made numerical calculations for the system ofa water-Perspex interface. Specifically, in the post-critical-angle region, we observed a lateral displacement （and transition time） of the reflected P-wave with respect to the incident P-wave. The first arrival of the acoustic signal from the interface is found to be a reflected P-wave rather than the sliding-refraction P-wave usually described in traditional acoustic-logging sliding P-wave theory. For both proposed models, the effective propagation speed of the reflected P-wave along the interface depends on not only the physical properties of the interracial media but also the incident angle. These observations are intriguing and warrant further investigation.

Pneumatic Performance of Staggered Impulse Turbine for OWC Wave Energy Convertor

A staggered impulse turbine is proposed for asymmetric air flows in Oscillating Water Column wave energy plants, which is expected to enhance the pneumatic power output in a wave cycle. The setting angle of rotor blades is set as 5°. The 3D numerical simulations were conducted under steady conditions using MRF and Mixing Plane model based on CFD software Fluent 12.0. Its mean efficiencies under different velocity amplitude ratios are studied using quasi-steady analysis, which derive corresponding data from the numerical simulation. It is found that the staggered turbine shows better performance than the conventional one under the asymmetrical air flows. Furthermore, its mean efficiency and output-work in a wave period are compared with another unsymmetrical twin impulse turbine system. The results show that the staggered turbine shows better output-work performance than the twin turbine system over the high flow coefficient domain(φ>0.7), which provides more choices to future research on turbine's optimization.

Design and experimental validation of looped-tube thermoacoustic engine

The aim of this paper is to present the design and experimental validation process for a thermoacoustic looped-tube engine. The design procedure consists of numerical modelling of the system using DELTA EC tool, Design Environment for Low-amplitude ThermoAcousfic Energy Conversion, in particular the effects of mean pressure and regenerator configuration on the pressure amplitude and acoustic power generated. This is followed by the construction of a practical engine system equipped with a ceramic regenerator - a substrate used in auto- motive catalytic converters with fine square channels. The preliminary testing results are obtained and compared with the simulations in detail.The measurement results agree very well on the qualitative level and are reasonably close in the quantitative sense.