Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementat...Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementation of LVDS Input/Output (I/O) interface circuits in a standard 0.18 μm CMOS technology using thick gate oxide devices (3.3 V), fully compatible with LVDS standard. In the proposed transmitter, a novel Common-Mode FeedBack (CMFB)circuit is utilized to keep the common-mode output voltage stable over Process, supply Voltage and Temperature (PVT) variations. Because there are no area greedy resistors in the CMFB circuitry, the disadvantage of large die area in existing transmitter structures is avoided. To obtain sufficient gain, the receiver consists of three am- plifying stages: a voltage amplifying stage, a transconductance amplifying stage, and a transimpedance amplifying stage. And to exclude inner nodes with high RC time constant, shunt-shunt negative feedback is introduced in the receiver. A novel active inductor shunt peaking structure is used in the receiver to fulfill the stringent requirements of high speed and wide Common-Mode Input Region (CMIR) without voltage gain, power dissipation and silicon area penalty. Simulation results show that data rates of 2 Gbps and 2.5 Gbps are achieved for the transmitter and receiver with power con- sumption of 13.2 mW and 8.3 mW respectively.展开更多
Currently, the elastic interconnection has realized the high-rate data transmission among data centers(DCs). Thus, the elastic data center network(EDCN) emerged. In EDCNs, it is essential to achieve the virtual networ...Currently, the elastic interconnection has realized the high-rate data transmission among data centers(DCs). Thus, the elastic data center network(EDCN) emerged. In EDCNs, it is essential to achieve the virtual network(VN) embedding, which includes two main components: VM(virtual machine) mapping and VL(virtual link) mapping. In VM mapping, we allocate appropriate servers to hold VMs. While for VL mapping,an optimal substrate path is determined for each virtual lightpath. For the VN embedding in EDCNs, the power efficiency is a significant concern, and some solutions were proposed through sleeping light-duty servers.However, the increasing communication traffic between VMs leads to a serious energy dissipation problem, since it also consumes a great amount of energy on switches even utilizing the energy-efficient optical transmission technique. In this paper, considering load balancing and power-efficient VN embedding, we formulate the problem and design a novel heuristic for EDCNs, with the objective to achieve the power savings of servers and switches. In our solution, VMs are mapped into a single DC or multiple DCs with the short distance between each other, and the servers in the same cluster or adjacent clusters are preferred to hold VMs. Such that, a large amount of servers and switches will become vacant and can go into sleep mode. Simulation results demonstrate that our method performs well in terms of power savings and load balancing. Compared with benchmarks, the improvement ratio of power efficiency is 5%–13%.展开更多
文摘Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementation of LVDS Input/Output (I/O) interface circuits in a standard 0.18 μm CMOS technology using thick gate oxide devices (3.3 V), fully compatible with LVDS standard. In the proposed transmitter, a novel Common-Mode FeedBack (CMFB)circuit is utilized to keep the common-mode output voltage stable over Process, supply Voltage and Temperature (PVT) variations. Because there are no area greedy resistors in the CMFB circuitry, the disadvantage of large die area in existing transmitter structures is avoided. To obtain sufficient gain, the receiver consists of three am- plifying stages: a voltage amplifying stage, a transconductance amplifying stage, and a transimpedance amplifying stage. And to exclude inner nodes with high RC time constant, shunt-shunt negative feedback is introduced in the receiver. A novel active inductor shunt peaking structure is used in the receiver to fulfill the stringent requirements of high speed and wide Common-Mode Input Region (CMIR) without voltage gain, power dissipation and silicon area penalty. Simulation results show that data rates of 2 Gbps and 2.5 Gbps are achieved for the transmitter and receiver with power con- sumption of 13.2 mW and 8.3 mW respectively.
基金supported in part by Open Foundation of State Key Laboratory of Information Photonics and Optical Communications (Grant No. IPOC2014B009)Fundamental Research Funds for the Central Universities (Grant Nos. N130817002, N140405005, N150401002)+3 种基金Foundation of the Education Department of Liaoning Province (Grant No. L2014089)National Natural Science Foundation of China (Grant Nos. 61302070, 61401082, 61471109, 61502075)Liaoning Bai Qian Wan Talents ProgramNational High-Level Personnel Special Support Program for Youth Top-Notch Talent
文摘Currently, the elastic interconnection has realized the high-rate data transmission among data centers(DCs). Thus, the elastic data center network(EDCN) emerged. In EDCNs, it is essential to achieve the virtual network(VN) embedding, which includes two main components: VM(virtual machine) mapping and VL(virtual link) mapping. In VM mapping, we allocate appropriate servers to hold VMs. While for VL mapping,an optimal substrate path is determined for each virtual lightpath. For the VN embedding in EDCNs, the power efficiency is a significant concern, and some solutions were proposed through sleeping light-duty servers.However, the increasing communication traffic between VMs leads to a serious energy dissipation problem, since it also consumes a great amount of energy on switches even utilizing the energy-efficient optical transmission technique. In this paper, considering load balancing and power-efficient VN embedding, we formulate the problem and design a novel heuristic for EDCNs, with the objective to achieve the power savings of servers and switches. In our solution, VMs are mapped into a single DC or multiple DCs with the short distance between each other, and the servers in the same cluster or adjacent clusters are preferred to hold VMs. Such that, a large amount of servers and switches will become vacant and can go into sleep mode. Simulation results demonstrate that our method performs well in terms of power savings and load balancing. Compared with benchmarks, the improvement ratio of power efficiency is 5%–13%.
