In order to implement semantic mapping of database metasearch engines, a system is proposed, which uses ontology as the organization form of information and records the new words not appearing in the ontology. When th...In order to implement semantic mapping of database metasearch engines, a system is proposed, which uses ontology as the organization form of information and records the new words not appearing in the ontology. When the new word＇ s frequency of use exceeds the threshold, it is added into the ontology. Ontology expansion is implemented in this way. The search process supports ＂and＂ and ＂or＂ Boolean operations accordingly. In order to improve the mapping speed of the system, a memory module is added which can memorize the recent query information of users and automatically learn the user＇ s query interest during the mapping which can dynamically decide the search order of instances tables. Experiments prove that these measures can obviously reduce the average mapping time.展开更多
To efficiently exploit the performance of single instruction multiple data （SIMD） architectures for video coding, a parallel memory architecture with power-of-two memory modules is proposed. It employs two novel ske...To efficiently exploit the performance of single instruction multiple data （SIMD） architectures for video coding, a parallel memory architecture with power-of-two memory modules is proposed. It employs two novel skewing schemes to provide conflict-free access to adjacent elements （8-bit and 16-bit data types） or with power-of-two intervals in both horizontal and vertical directions, which were not possible in previous parallel memory architectures. Area consumptions and delay estimations are given respectively with 4, 8 and 16 memory modules. Under a 0.18-pm CMOS technology, the synthesis results show that the proposed system can achieve 230 MHz clock frequency with 16 memory modules at the cost of 19k gates when read and write latencies are 3 and 2 clock cycles, respectively. We implement the proposed parallel memory architecture on a video signal processor （VSP）. The results show that VSP enhanced with the proposed architecture achieves 1.28× speedups for H.264 real-time decoding.展开更多
An internal structure of Ternary Content Addressable Memory (TCAM) is designed and a Sorting Prefix Block (SPB) algorithm is presented, which is a wire-speed routing lookup algorithm based on TCAM. SPB algorithm makes...An internal structure of Ternary Content Addressable Memory (TCAM) is designed and a Sorting Prefix Block (SPB) algorithm is presented, which is a wire-speed routing lookup algorithm based on TCAM. SPB algorithm makes use of the parallelism of TCAM adequately, and improves the utilization of TCAM by optimum partitions. With the aid of effective management algorithm and memory image, SPB separates critical searching from assistant searching, and improves the searching effect. One performance test indicates that this algorithm can work with different TCAM to meet the requirement of wire-speed routing lookup.展开更多
To systematically incorporate multiple influencing factors,the coupled-state frequency memory(Co-SFM)network is proposed.This model integrates Copula estimation with neural networks,fusing multilevel data information,...To systematically incorporate multiple influencing factors,the coupled-state frequency memory(Co-SFM)network is proposed.This model integrates Copula estimation with neural networks,fusing multilevel data information,which is then fed into downstream learning modules.Co-SFM employs an upstream fusion module to incorporate multilevel data,thereby constructing a macro-plate-micro data structure.This configuration helps identify and integrate characteristics from different data levels,facilitating a deeper understanding of the internal links within the financial system.In the downstream model,Co-SFM uses a state-frequency memory network to mine hidden frequency information within stock prices,and the multifrequency patterns of sequential data are modeled.Empirical results show that Co-SFM s prediction accuracy for stock price trends is significantly better than that of other models.This is especially evident in multistep medium and long-term trend predictions,where integrating multilevel data results in notably improved accuracy.展开更多
With the development of technology,the learning and memory functions of artificial memristor synapses are necessary for realizing artificial neural networks and neural neuromorphic computing.Owing to their high scalab...With the development of technology,the learning and memory functions of artificial memristor synapses are necessary for realizing artificial neural networks and neural neuromorphic computing.Owing to their high scalability performance,nanosheet materials have been widely employed in cellular-level learning,but the behaviors of nociceptor based on nanosheet materials have rarely been studied.Here,we present a memristor with an Al/TiO_(2)/Pt structure.After electroforming,the memristor device showed a gradual conductance regulation and could simulate synaptic functions such as the potentiation and depression of synaptic weights.We also designed a new scheme that verifies the pain sensitization,desensitization,allodynia,and hyperalgesia behaviors of real nociceptors in the fabricated memristor.Memristors with these behaviors can significantly improve the quality of intelligent electronic devices.Data fitting showed that the high resistance and low resistance states were consistent with the hopping conduction mechanism.This work promises the application of TiO_(2)-based devices in next-generation neuromorphological systems.展开更多
文摘In order to implement semantic mapping of database metasearch engines, a system is proposed, which uses ontology as the organization form of information and records the new words not appearing in the ontology. When the new word＇ s frequency of use exceeds the threshold, it is added into the ontology. Ontology expansion is implemented in this way. The search process supports ＂and＂ and ＂or＂ Boolean operations accordingly. In order to improve the mapping speed of the system, a memory module is added which can memorize the recent query information of users and automatically learn the user＇ s query interest during the mapping which can dynamically decide the search order of instances tables. Experiments prove that these measures can obviously reduce the average mapping time.
基金Project (No. 2005AA1Z1271) supported by the Hi-Tech Research and Development Program (863) of China
文摘To efficiently exploit the performance of single instruction multiple data （SIMD） architectures for video coding, a parallel memory architecture with power-of-two memory modules is proposed. It employs two novel skewing schemes to provide conflict-free access to adjacent elements （8-bit and 16-bit data types） or with power-of-two intervals in both horizontal and vertical directions, which were not possible in previous parallel memory architectures. Area consumptions and delay estimations are given respectively with 4, 8 and 16 memory modules. Under a 0.18-pm CMOS technology, the synthesis results show that the proposed system can achieve 230 MHz clock frequency with 16 memory modules at the cost of 19k gates when read and write latencies are 3 and 2 clock cycles, respectively. We implement the proposed parallel memory architecture on a video signal processor （VSP）. The results show that VSP enhanced with the proposed architecture achieves 1.28× speedups for H.264 real-time decoding.
文摘An internal structure of Ternary Content Addressable Memory (TCAM) is designed and a Sorting Prefix Block (SPB) algorithm is presented, which is a wire-speed routing lookup algorithm based on TCAM. SPB algorithm makes use of the parallelism of TCAM adequately, and improves the utilization of TCAM by optimum partitions. With the aid of effective management algorithm and memory image, SPB separates critical searching from assistant searching, and improves the searching effect. One performance test indicates that this algorithm can work with different TCAM to meet the requirement of wire-speed routing lookup.
基金The National Natural Science Foundation of China(No.72173018).
文摘To systematically incorporate multiple influencing factors,the coupled-state frequency memory(Co-SFM)network is proposed.This model integrates Copula estimation with neural networks,fusing multilevel data information,which is then fed into downstream learning modules.Co-SFM employs an upstream fusion module to incorporate multilevel data,thereby constructing a macro-plate-micro data structure.This configuration helps identify and integrate characteristics from different data levels,facilitating a deeper understanding of the internal links within the financial system.In the downstream model,Co-SFM uses a state-frequency memory network to mine hidden frequency information within stock prices,and the multifrequency patterns of sequential data are modeled.Empirical results show that Co-SFM s prediction accuracy for stock price trends is significantly better than that of other models.This is especially evident in multistep medium and long-term trend predictions,where integrating multilevel data results in notably improved accuracy.
基金financially supported by the National Natural Science Foundation of China(61674050 and 61874158)the Project of Distinguished Youth of Hebei Province(A2018201231)+5 种基金the Hundred Persons Plan of Hebei Province(E2018050004 and E2018050003)the Supporting Plan for 100 Excellent Innovative Talents in Colleges and Universities of Hebei Province(SLRC2019018)the Special Project of Strategic Leading Science and Technology of Chinese Academy of Sciences(XDB44000000-7)the Outstanding Young Scientific Research and Innovation Team of Hebei Universitythe Highlevel Talent Research Startup Project of Hebei University(521000981426)the Special Support Funds for National High Level Talents(041500120001 and 521000981429)。
文摘With the development of technology,the learning and memory functions of artificial memristor synapses are necessary for realizing artificial neural networks and neural neuromorphic computing.Owing to their high scalability performance,nanosheet materials have been widely employed in cellular-level learning,but the behaviors of nociceptor based on nanosheet materials have rarely been studied.Here,we present a memristor with an Al/TiO_(2)/Pt structure.After electroforming,the memristor device showed a gradual conductance regulation and could simulate synaptic functions such as the potentiation and depression of synaptic weights.We also designed a new scheme that verifies the pain sensitization,desensitization,allodynia,and hyperalgesia behaviors of real nociceptors in the fabricated memristor.Memristors with these behaviors can significantly improve the quality of intelligent electronic devices.Data fitting showed that the high resistance and low resistance states were consistent with the hopping conduction mechanism.This work promises the application of TiO_(2)-based devices in next-generation neuromorphological systems.
