In the study and implementation of a programmable RS codec module in satellite communication modem, FPGA is used as the kernel in the implementation, while some ASICs are used as necessary assistant measures. The modu...In the study and implementation of a programmable RS codec module in satellite communication modem, FPGA is used as the kernel in the implementation, while some ASICs are used as necessary assistant measures. The module includes the RS codec unit, the interleaver and deinterleaver unit, the scrambler and descrambler unit and the frame synchronization unit. The module is realized successfully and it can be programmed on-line to meet the requirements of IESS 308/309/310 including many specifications about different service types and data rates. With the implementation combining FPGA with ASICs, size of the circuit is much reduced, its flexibility dramatically increased, and its stability further strengthened. Furthermore, the module is based on the software radio concept and can be easily integrated into the whole satellite communication modem.展开更多
It is well known that interleavers play a critical role in Turbo coding/decoding schemes, and contention-free interleaver design has become a serious problem in the paraUelization of Turbo decoding, which is indispens...It is well known that interleavers play a critical role in Turbo coding/decoding schemes, and contention-free interleaver design has become a serious problem in the paraUelization of Turbo decoding, which is indispensable to meet the demands for high throughput and low latency in next generation mobile communication systems. This paper unveils the fact that interleavers based on permutation polynomials modulo N are contention-free for every window size W, a factor of the intedeaver length N, which, also called maximum contention-free interleavers.展开更多
文摘In the study and implementation of a programmable RS codec module in satellite communication modem, FPGA is used as the kernel in the implementation, while some ASICs are used as necessary assistant measures. The module includes the RS codec unit, the interleaver and deinterleaver unit, the scrambler and descrambler unit and the frame synchronization unit. The module is realized successfully and it can be programmed on-line to meet the requirements of IESS 308/309/310 including many specifications about different service types and data rates. With the implementation combining FPGA with ASICs, size of the circuit is much reduced, its flexibility dramatically increased, and its stability further strengthened. Furthermore, the module is based on the software radio concept and can be easily integrated into the whole satellite communication modem.
基金Project (No. 60332030) supported by the National Natural ScienceFoundation of China
文摘It is well known that interleavers play a critical role in Turbo coding/decoding schemes, and contention-free interleaver design has become a serious problem in the paraUelization of Turbo decoding, which is indispensable to meet the demands for high throughput and low latency in next generation mobile communication systems. This paper unveils the fact that interleavers based on permutation polynomials modulo N are contention-free for every window size W, a factor of the intedeaver length N, which, also called maximum contention-free interleavers.
