在数字集成电路(Integrated Circuit,IC)设计中,一些流水运行、分级计算的电路,使用全局控制信号(Global Control Signal,GCS)来进行设计是易于实现的一种方法。对于时序紧张的全局控制信号,通过在逻辑设计阶段,降低全局控制信号控制优...在数字集成电路(Integrated Circuit,IC)设计中,一些流水运行、分级计算的电路,使用全局控制信号(Global Control Signal,GCS)来进行设计是易于实现的一种方法。对于时序紧张的全局控制信号,通过在逻辑设计阶段,降低全局控制信号控制优先级;在逻辑综合阶段,加入多周期路径设置的指令,可以将全局控制信号设置为具有多周期路径特性的信号,能够有效地改善时序,降低后期物理设计的布线难度,从而达到设计目的。展开更多
To combat the well-known state-space explosion problem in Prop ositional Linear T emp o- ral Logic （PLTL） model checking, a novel algo- rithm capable of translating PLTL formulas into Nondeterministic Automata （NA...To combat the well-known state-space explosion problem in Prop ositional Linear T emp o- ral Logic （PLTL） model checking, a novel algo- rithm capable of translating PLTL formulas into Nondeterministic Automata （NA） in an efficient way is proposed. The algorithm firstly transforms PLTL formulas into their non-free forms, then it further translates the non-free formulas into their Normal Forms （NFs）, next constructs Normal Form Graphs （NFGs） for NF formulas, and it fi- nally transforms NFGs into the NA which ac- cepts both finite words and int-mite words. The experimental data show that the new algorithm re- duces the average number of nodes of target NA for a benchmark formula set and selected formulas in the literature, respectively. These results indi- cate that the PLTL model checking technique em- ploying the new algorithm generates a smaller state space in verification of concurrent systems.展开更多
文摘在数字集成电路(Integrated Circuit,IC)设计中,一些流水运行、分级计算的电路,使用全局控制信号(Global Control Signal,GCS)来进行设计是易于实现的一种方法。对于时序紧张的全局控制信号,通过在逻辑设计阶段,降低全局控制信号控制优先级;在逻辑综合阶段,加入多周期路径设置的指令,可以将全局控制信号设置为具有多周期路径特性的信号,能够有效地改善时序,降低后期物理设计的布线难度,从而达到设计目的。
基金The first author of this paper would like to thank the follow- ing scholars, Prof. Joseph Sifakis, 2007 Turing Award Winner, for his invaluable help with my research and Dr. Kevin Lu at Brunel University, UK for his excellent suggestions on this paper. This work was supported by the National Natural Sci- ence Foundation of China under Grant No.61003079 the Chi- na Postdoctoral Science Foundation under Grant No. 2012M511588.
文摘To combat the well-known state-space explosion problem in Prop ositional Linear T emp o- ral Logic （PLTL） model checking, a novel algo- rithm capable of translating PLTL formulas into Nondeterministic Automata （NA） in an efficient way is proposed. The algorithm firstly transforms PLTL formulas into their non-free forms, then it further translates the non-free formulas into their Normal Forms （NFs）, next constructs Normal Form Graphs （NFGs） for NF formulas, and it fi- nally transforms NFGs into the NA which ac- cepts both finite words and int-mite words. The experimental data show that the new algorithm re- duces the average number of nodes of target NA for a benchmark formula set and selected formulas in the literature, respectively. These results indi- cate that the PLTL model checking technique em- ploying the new algorithm generates a smaller state space in verification of concurrent systems.
