针对多沟道碳纳米晶体管(MC-CNTFET)越来越接近实用化的发展现状,提出了一种多沟道碳纳米晶体管的集成电路仿真SPICE(Simulation program with integrated ciruit emphasis)模型,并基于此模型,对用多沟道碳纳米晶体管构成的环形振荡器...针对多沟道碳纳米晶体管(MC-CNTFET)越来越接近实用化的发展现状,提出了一种多沟道碳纳米晶体管的集成电路仿真SPICE(Simulation program with integrated ciruit emphasis)模型,并基于此模型,对用多沟道碳纳米晶体管构成的环形振荡器进行了分析。结果表明,该模型能够很好地模拟多沟道碳纳米晶体管的电学特性,进一步分析表明,基于50 nm多沟道碳纳米晶体管环形振荡器的振荡频率可达90 GHz,显示出多沟道碳纳米晶体管电路具有很大的性能优势。展开更多
A novel low temperature poly\|Si(LTPS) ultra\|thin channel thin film transistor (UTC\|TFT) technology is proposed. The UTC\|TFT has an ultra\|thin channel region (30nm) and a thick drain/source region (300nm). The ult...A novel low temperature poly\|Si(LTPS) ultra\|thin channel thin film transistor (UTC\|TFT) technology is proposed. The UTC\|TFT has an ultra\|thin channel region (30nm) and a thick drain/source region (300nm). The ultra\|thin channel region that can result in a lower grain\|boundary trap density in the channel is connected to the heavily\|doped thick drain/source region through a lightly\|doped overlapped region. The overlapped lightly\|doped region provides an effective way for the electric field to spread in the channel near the drain at high drain biases, thereby reducing the electric field there significantly. Simulation results show the UTC\|TFT experiences a 50% reduction in peak lateral electric field compared to that of the conventional TFT. With the low grain\|boundary trap density and low drain electric field, excellent current saturation characteristics and high drain breakdown voltage are achieved in the UTC\|TFT. Moreover, this technology provides the complementary LTPS\|TFTs with more than 2 times increase in on\|current, 3.5 times reduction in off\|current compared to the conventional thick channel LTPS TFTs.展开更多
A new method is used to simulate InGaAs/InP composite channel high electron mobility transistors （HEMTs）. By coupling the hydrodynamic model and the density gradient model, the electron density distribution in the c...A new method is used to simulate InGaAs/InP composite channel high electron mobility transistors （HEMTs）. By coupling the hydrodynamic model and the density gradient model, the electron density distribution in the channel in different electric fields is obtained. This method is faster and more robust than traditional meth- ods and should be applicable to other types of HEMTs simulations. A detailed study of the InGaAs/InP composite channel HEMTs is presented with the help of simulations.展开更多
The channel lateral pocket or halo region of NMOSFET characterized by interface state R G current of a forward gated diode has been investigated numerically for the first time.The result of numerical analysis demons...The channel lateral pocket or halo region of NMOSFET characterized by interface state R G current of a forward gated diode has been investigated numerically for the first time.The result of numerical analysis demonstrates that the effective surface doping concentration and the interface state density of the pocket or halo region are interface states R G current peak position dependent and amplitude dependent,respectively.It can be expressed quantitatively according to the device physics knowledge,thus,the direct characterization of the interface state density and the effective surface doping concentration of the pocket or halo becomes very easy.展开更多
The process parameters are adjusted and the process procedure is simplified on the basis of precursor's work and the strained Si channel SiGe n MOSFET is fabricated successfully.This n MOSFET takes the strained...The process parameters are adjusted and the process procedure is simplified on the basis of precursor's work and the strained Si channel SiGe n MOSFET is fabricated successfully.This n MOSFET takes the strained Si layer(which is deposited on the relaxed SiGe buffer layer) as current channel and can provide a 48 5% improvement in electron mobility while keeping the gate voltage as 1V.展开更多
The effect of channel length and width on the large and small-signal parameters of the graphene field effect transistor have been explored using an analytical approach.In the case of faster saturation as well as extre...The effect of channel length and width on the large and small-signal parameters of the graphene field effect transistor have been explored using an analytical approach.In the case of faster saturation as well as extremely high transit frequency,the graphene field effect transistor shows outstanding performance.From the transfer curve,it is observed that there is a positive shift of Dirac point from the voltage of 0.15 V to 0.35 V because of reducing channel length from 440 nm to 20 nm and this curve depicts that graphene shows ambipolar behavior.Besides,it is found that because of widening channel the drain current increases and the maximum current is found approximately 2.4 mA and 6 mA for channel width 2μm and 5μm respectively.Furthermore,an approximate symmetrical capacitance-voltage(C-V)characteristic of the graphene field effect transistor is obtained and the capacitance reduces when the channel length decreases but the capacitance can be increased by raising the channel width.In addition,a high transconductance,that demands high-speed radio frequency(RF)applications,of 6.4 mS at channel length 20 nm and 4.45 mS at channel width 5μm along with a high transit frequency of 3.95 THz have been found that demands high-speed radio frequency applications.展开更多
文摘针对多沟道碳纳米晶体管(MC-CNTFET)越来越接近实用化的发展现状,提出了一种多沟道碳纳米晶体管的集成电路仿真SPICE(Simulation program with integrated ciruit emphasis)模型,并基于此模型,对用多沟道碳纳米晶体管构成的环形振荡器进行了分析。结果表明,该模型能够很好地模拟多沟道碳纳米晶体管的电学特性,进一步分析表明,基于50 nm多沟道碳纳米晶体管环形振荡器的振荡频率可达90 GHz,显示出多沟道碳纳米晶体管电路具有很大的性能优势。
文摘A novel low temperature poly\|Si(LTPS) ultra\|thin channel thin film transistor (UTC\|TFT) technology is proposed. The UTC\|TFT has an ultra\|thin channel region (30nm) and a thick drain/source region (300nm). The ultra\|thin channel region that can result in a lower grain\|boundary trap density in the channel is connected to the heavily\|doped thick drain/source region through a lightly\|doped overlapped region. The overlapped lightly\|doped region provides an effective way for the electric field to spread in the channel near the drain at high drain biases, thereby reducing the electric field there significantly. Simulation results show the UTC\|TFT experiences a 50% reduction in peak lateral electric field compared to that of the conventional TFT. With the low grain\|boundary trap density and low drain electric field, excellent current saturation characteristics and high drain breakdown voltage are achieved in the UTC\|TFT. Moreover, this technology provides the complementary LTPS\|TFTs with more than 2 times increase in on\|current, 3.5 times reduction in off\|current compared to the conventional thick channel LTPS TFTs.
文摘A new method is used to simulate InGaAs/InP composite channel high electron mobility transistors （HEMTs）. By coupling the hydrodynamic model and the density gradient model, the electron density distribution in the channel in different electric fields is obtained. This method is faster and more robust than traditional meth- ods and should be applicable to other types of HEMTs simulations. A detailed study of the InGaAs/InP composite channel HEMTs is presented with the help of simulations.
文摘The channel lateral pocket or halo region of NMOSFET characterized by interface state R G current of a forward gated diode has been investigated numerically for the first time.The result of numerical analysis demonstrates that the effective surface doping concentration and the interface state density of the pocket or halo region are interface states R G current peak position dependent and amplitude dependent,respectively.It can be expressed quantitatively according to the device physics knowledge,thus,the direct characterization of the interface state density and the effective surface doping concentration of the pocket or halo becomes very easy.
文摘The process parameters are adjusted and the process procedure is simplified on the basis of precursor's work and the strained Si channel SiGe n MOSFET is fabricated successfully.This n MOSFET takes the strained Si layer(which is deposited on the relaxed SiGe buffer layer) as current channel and can provide a 48 5% improvement in electron mobility while keeping the gate voltage as 1V.
基金supported by the National Key Research and Development Program of China(No.2018YFE0204000)the National Natural Science Foundation of China(No.61674141,No.51972300,No.61504134 and No.21975245)+2 种基金The Strategic Priority Research Program of Chinese Academy of Sciences(No.XDB43000000)The World Academy of Sciences(TWAS),and the Key Research Program of Frontier Science,Chinese Academy of Sciences(No.QYZDBSSW-SLH006)support from Youth Innovation Promotion Association,Chinese Academy of Sciences(No.2020114).
文摘The effect of channel length and width on the large and small-signal parameters of the graphene field effect transistor have been explored using an analytical approach.In the case of faster saturation as well as extremely high transit frequency,the graphene field effect transistor shows outstanding performance.From the transfer curve,it is observed that there is a positive shift of Dirac point from the voltage of 0.15 V to 0.35 V because of reducing channel length from 440 nm to 20 nm and this curve depicts that graphene shows ambipolar behavior.Besides,it is found that because of widening channel the drain current increases and the maximum current is found approximately 2.4 mA and 6 mA for channel width 2μm and 5μm respectively.Furthermore,an approximate symmetrical capacitance-voltage(C-V)characteristic of the graphene field effect transistor is obtained and the capacitance reduces when the channel length decreases but the capacitance can be increased by raising the channel width.In addition,a high transconductance,that demands high-speed radio frequency(RF)applications,of 6.4 mS at channel length 20 nm and 4.45 mS at channel width 5μm along with a high transit frequency of 3.95 THz have been found that demands high-speed radio frequency applications.
文摘对一种适用于106.68cm PDP扫描驱动IC的HV-PMOS器件进行了分析研究。通过使用TCAD软件对HV-PMOS进行了综合仿真,得到了器件性能最优时的结构参数及工艺参数。HV-PMOS器件及整体扫描驱动IC在杭州士兰集成电路公司完成流片。PCM(Process control module)片上的HV-PMOS击穿电压达到了185V,阈值为6.5V。整体扫描驱动芯片的击穿电压达到了180V,满足了设计要求。
