Methods for improving the high current performance of static induction transistor （SIT） are presented.Many important factors,such as ＂trans-conductance per unit channel width＂ θ, ＂gate efficiency＂ η, ＂sensiti...Methods for improving the high current performance of static induction transistor （SIT） are presented.Many important factors,such as ＂trans-conductance per unit channel width＂ θ, ＂gate efficiency＂ η, ＂sensitivity factor＂ D,and ＂intrinsic static gain＂ μ0,that may be used to describe different aspects of the electrical performance of an SIT are first defined.The dependences of electrical parameters on the structure and technological process of an SIT are revealed for the first time.The packaging technologies are so important for the improvement of high power performance of SITs that they must be paid attention.Testing techniques and circuits for measuring frequency and power parameters of SITs are designed and constructed.The influence of packaging processes in technological practice on the electrical performance of SITs is also discussed in depth.展开更多
Intrinsic carrier transport properties of single-walled carbon nanotubes have been probed by two parallel methods on the same individual tubes： The contactless dielectric force microscopy （DFM） technique and the co...Intrinsic carrier transport properties of single-walled carbon nanotubes have been probed by two parallel methods on the same individual tubes： The contactless dielectric force microscopy （DFM） technique and the conventional field-effect transistor （FET） method. The dielectric responses of SWNTs are strongly correlated with electronic transport of the corresponding FETs. The DC bias voltage in DFM plays a role analogous to the gate voltage in FET. A microscopic model based on the general continuity equation and numerical simulation is built to reveal the link between intrinsic properties such as carrier concentration and mobility and the macroscopic observable, i.e. dielectric responses, in DFM experiments. Local transport barriers in nanotubes, which influence the device transport behaviors, are also detected with nanometer scale resolution.展开更多
文摘Methods for improving the high current performance of static induction transistor （SIT） are presented.Many important factors,such as ＂trans-conductance per unit channel width＂ θ, ＂gate efficiency＂ η, ＂sensitivity factor＂ D,and ＂intrinsic static gain＂ μ0,that may be used to describe different aspects of the electrical performance of an SIT are first defined.The dependences of electrical parameters on the structure and technological process of an SIT are revealed for the first time.The packaging technologies are so important for the improvement of high power performance of SITs that they must be paid attention.Testing techniques and circuits for measuring frequency and power parameters of SITs are designed and constructed.The influence of packaging processes in technological practice on the electrical performance of SITs is also discussed in depth.
文摘Intrinsic carrier transport properties of single-walled carbon nanotubes have been probed by two parallel methods on the same individual tubes： The contactless dielectric force microscopy （DFM） technique and the conventional field-effect transistor （FET） method. The dielectric responses of SWNTs are strongly correlated with electronic transport of the corresponding FETs. The DC bias voltage in DFM plays a role analogous to the gate voltage in FET. A microscopic model based on the general continuity equation and numerical simulation is built to reveal the link between intrinsic properties such as carrier concentration and mobility and the macroscopic observable, i.e. dielectric responses, in DFM experiments. Local transport barriers in nanotubes, which influence the device transport behaviors, are also detected with nanometer scale resolution.
