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扫描电子显微镜在栅光刻工艺中的应用
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作者 李保第 刘福庆 +1 位作者 付兴昌 张绵 《微纳电子技术》 CAS 2008年第9期538-541,共4页
阐述了扫描电子显微镜在解决栅光刻在线监测中遇到的问题和解决过程。在充分的理论分析基础上,通过大量实验研究,克服了光刻胶在高能电子辐照下变形、变性的问题;削弱了光刻胶样品表面荷电对图像质量的影响;在观测"T"型栅的... 阐述了扫描电子显微镜在解决栅光刻在线监测中遇到的问题和解决过程。在充分的理论分析基础上,通过大量实验研究,克服了光刻胶在高能电子辐照下变形、变性的问题;削弱了光刻胶样品表面荷电对图像质量的影响;在观测"T"型栅的胶窗口时采用特殊的工作条件获得了三层胶的立体形貌图像,从而能够观察三层胶的内部结构。上述问题的解决和技术的改进实现了栅光刻工艺的在线监测;并为栅光刻工艺的稳定和改进、产品成品率的提高提供了大量数据和图像。 展开更多
关键词 扫描电子显微镜 栅光刻 二次电子 背散射电子 荷电
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A Novel Sub-50nm Poly-Si Gate Patterning Technology
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作者 张盛东 韩汝琦 +3 位作者 刘晓彦 关旭东 李婷 张大成 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2001年第5期565-568,共4页
A novel low-cost sub-50nm poly-Si gate patterning technology is proposed and experimentally demonstrated.The technology is resolution-independent,ie.,it does not contain any critical photolithographic steps.The nano-s... A novel low-cost sub-50nm poly-Si gate patterning technology is proposed and experimentally demonstrated.The technology is resolution-independent,ie.,it does not contain any critical photolithographic steps.The nano-scale masking pattern for gate formation is formed according to the image transfer of an edge-defined spacer.Experimental results reveal that the resultant gate length,about 75 to 85 percent of the thickness,is determined by the thickness of the film to form the spacer.From SEM photograph,the cross-section of the poly-Si gate is seen to be an inverted-trapezoid,which is useful to reduce the gate resistance. 展开更多
关键词 poly-Si gate sub-50nm image transfer LITHOGRAPHY
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200nm Gate Length Metamorphic In_(0.52)Al_(0.48)As/In_(0.6)Ga_(0.4) As HEMTs on GaAs Substrates with 110GHz f_T
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作者 黎明 张海英 +1 位作者 徐静波 付晓君 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第9期1679-1681,共3页
200nm gate-length GaAs-based InAlAs/InGaAs MHEMTs are fabricated by MBE epitaxial material and EBL (electron beam lithography) technology. Ti/Pt/Au is evaporated to form gate metals. A T-shaped gate is produced usin... 200nm gate-length GaAs-based InAlAs/InGaAs MHEMTs are fabricated by MBE epitaxial material and EBL (electron beam lithography) technology. Ti/Pt/Au is evaporated to form gate metals. A T-shaped gate is produced using a novel PMMA/PMGI/PMMA trilayer resist structure to decrease parasitic capacitance and parasitic resistance of the gate. Excellent DC and RF performances are obtained and the transconductance (gm) ,maximum saturation drain current density (Joss), threshold voltage ( VT), current cut-off frequency (fT) , and maximum oscillation frequency (fmax) of InAlAs/ InGaAs MHEMTs are 510mS/mm,605mA/mm, -1.8V, 110GHz, and 72GHz, respectively. 展开更多
关键词 MHEMT INALAS/INGAAS electron beam lithography T-shaped gate
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Polysilicon Over-Etching Time Control of Advanced CMOS Processing with Emission Microscopy
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作者 赵毅 万星拱 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第1期17-19,共3页
The emission microscopy (EMMI) test is proposed as an effective method to control the polysilicon over-etching time of advanced CMOS processing combined with a novel test structure, named a poly-edge structure. From... The emission microscopy (EMMI) test is proposed as an effective method to control the polysilicon over-etching time of advanced CMOS processing combined with a novel test structure, named a poly-edge structure. From the values of the breakdown voltage (Vbd) of MOS capacitors (poly-edge structure) ,it was observed that,with for the initial polysilicon etching-time, almost all capacitors in one wafer failed under the initial failure model. With the increase of polysilicon over-etching time, the number of the initial failure capacitors decreased. Finally, no initial failure capacitors were observed after the polysilicon over-etching time was increased by 30s. The breakdown samples with the initial failure model and intrinsic failure model underwent EMMI tests. The EMMI test results show that the initial failure of capacitors with poly-edge structures was due to the bridging effect between the silicon substrate and the polysilicon gate caused by the residual polysilicon in the ditch between the shallow-trench isolation region and the active area, which will short the polysilicon gate with silicon substrate after the silicide process. 展开更多
关键词 polysilicon over-etching gate oxide reliability emission microscopy
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Spectral characterization of fiber Bragg grating with etched fiber cladding 被引量:2
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作者 周倩 宁提纲 +1 位作者 裴丽 李超 《Optoelectronics Letters》 EI 2012年第5期328-331,共4页
A new method is presented to tune Bragg wavelength slightly by using hydrofluoric acid to etch fiber cladding.The spectral characteristics before and after etching and the change properties of Bragg wavelength are stu... A new method is presented to tune Bragg wavelength slightly by using hydrofluoric acid to etch fiber cladding.The spectral characteristics before and after etching and the change properties of Bragg wavelength are studied.Cladding modes are reduced during the etching process.High-order cladding modes are converted into radiation modes,and energy of cladding modes is coupled to the outside.As the cladding radius decreases,the Bragg wavelength shifts to longer direction.Experimental results show that this method can tune Bragg wavelength slightly,and the tunable range is 0.002-0.120 nm. 展开更多
关键词 ETCHING Fiber Bragg gratings Hydrofluoric acid Spectrum analyzers WAVELENGTH
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Symmetrical fully-etched and chirped beam splitter based on a subwavelength binary blazed grating
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作者 周唯 张华良 +1 位作者 杨俊波 杨俊才 《Optoelectronics Letters》 EI 2012年第3期182-185,共4页
A novel symmetrical chirped beam splitter based on a binary blazed grating is proposed, which adopts the fully-etched grating structure compatible with the current fabrication facilities for CMOS technology and conven... A novel symmetrical chirped beam splitter based on a binary blazed grating is proposed, which adopts the fully-etched grating structure compatible with the current fabrication facilities for CMOS technology and convenient for integration and manufacture process. This structure can realize nearly equal-power splitting operation under the condition of TE polarization incidence. When the absolutely normal incidence occurs at the wavelength of 1580 nm, the coupling efficiencies of the left and the right branches are 43.627% and 43.753%, respectively. Moreover, this structure has the tolerances of 20 nm in etched depth and 3?in incident angle, which is rather convenient to manufacture facility. 展开更多
关键词 CMOS integrated circuits Optical instruments PRISMS
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