To reduce decoding delay of a communication scheme which is backward-decoding-based and achievable Chong Motani-Garg capacity bounds, a novel forward-sliding-window decoding-based communication scheme is proposed. In ...To reduce decoding delay of a communication scheme which is backward-decoding-based and achievable Chong Motani-Garg capacity bounds, a novel forward-sliding-window decoding-based communication scheme is proposed. In this scheme, if w = （w1, w2） is the message to be sent in block b, the relay will decode message w1 and generate a new message z at the end of block b, and the receiver will decode message w1 at the end of block b ＋ 1 and decode message z and w2 at the end of block b ＋ 2. Analysis results show that this new communication scheme can achieve the same Chong-Motani-Garg bounds and the decoding delay is only two blocks which is much shorter than that of backward decoding. Therefore, Chong-Motani-Garg bounds can be achieved by a forward decoding-based communication scheme with short decoding delay.展开更多
In this paper, we propose and evaluate outage performance of a mixed amplify-and-forward(AF) and decode-and-forward(DF) relaying protocol in underlay cognitive radio. Different from the conventional AF and DF protocol...In this paper, we propose and evaluate outage performance of a mixed amplify-and-forward(AF) and decode-and-forward(DF) relaying protocol in underlay cognitive radio. Different from the conventional AF and DF protocols, in the proposed protocol, a secondary source attempts to transmit its signal to a secondary destination with help of two secondary relays. One secondary relay always operates in AF mode, while the remaining one always operates in DF mode. Moreover, we also propose a relay selection method, which relies on the decoding status at the DF relay. For performance evaluation and comparison, we derive the exact and approximate closedform expressions of the outage probability for the proposed protocol over Rayleigh fading channel. Finally, we run Monte Carlo simulations to verify the derivations. Results presented that the proposed protocol obtains a diversity order of three and the outage performance of our scheme is between that of the conventional underlay DF protocol and that of the conventional underlay AF protocol.展开更多
德州仪器(TI)最近推出两款可支持新型便携设备与家庭娱乐设备的混合信号视频解码器T V P 5 1 4 6、TVP51 50.这两款高性能视频解码器将NTSC、PAL及SECAM视频信号转换成数字分量视频信号,适用于便携、批量大、高质量和高性能的视频产品,...德州仪器(TI)最近推出两款可支持新型便携设备与家庭娱乐设备的混合信号视频解码器T V P 5 1 4 6、TVP51 50.这两款高性能视频解码器将NTSC、PAL及SECAM视频信号转换成数字分量视频信号,适用于便携、批量大、高质量和高性能的视频产品,如个人视频设备、数字电视、手持消费类电子产品及移动电话电视.展开更多
This paper describes two single-chip——complex programmable logic devices/field programmable gate arrays(CPLD/FPGA)——implementations of the new advanced encryption standard (AES) algorithm based on the basic iterat...This paper describes two single-chip——complex programmable logic devices/field programmable gate arrays(CPLD/FPGA)——implementations of the new advanced encryption standard (AES) algorithm based on the basic iteration architecture (design [A]) and the hybrid pipelining architecture (design [B]). Design [A] is an encryption-and-decryption implementation based on the basic iteration architecture. This design not only supports 128-bit, 192-bit, 256-bit keys, but saves hardware resources because of the iteration architecture and sharing technology. Design [B] is a method of the 2×2 hybrid pipelining architecture. Based on the AES interleaved mode of operation, the design successfully accomplishes the algorithm, which operates in the feedback mode (cipher block chaining). It not only guarantees security of encryption/decryption, but obtains high data throughput of 1.05 Gb/s. The two designs have been realized on Aitera′s EP20k300EBC652-1 devices.展开更多
A hybrid decoding algorithm is proposed for nonbinary low-density parity-check （LDPC） codes, which combines the weighted symbol-flipping （WSF） algorithm with the fast Fourier trans- form q-ary sum-product algorit...A hybrid decoding algorithm is proposed for nonbinary low-density parity-check （LDPC） codes, which combines the weighted symbol-flipping （WSF） algorithm with the fast Fourier trans- form q-ary sum-product algorithm （FFT-QSPA）. The flipped position and value are determined by the symbol flipping metric and the received bit values in the first stage WSF algorithm. If the low- eomplexity WSF algorithm is failed, the second stage FFT-QSPA is activated as a switching strategy. Simulation results show that the proposed hybrid algorithm greatly reduces the computational complexity with the performance close to that of FFT-QSPA.展开更多
基金The Free Research Fund of National Mobile Communi-cations Research Laboratory of Southeast University(No.2008B06)the Na-tional Basic Research Program of China (973 Program)(No.2007CB310603)
文摘To reduce decoding delay of a communication scheme which is backward-decoding-based and achievable Chong Motani-Garg capacity bounds, a novel forward-sliding-window decoding-based communication scheme is proposed. In this scheme, if w = （w1, w2） is the message to be sent in block b, the relay will decode message w1 and generate a new message z at the end of block b, and the receiver will decode message w1 at the end of block b ＋ 1 and decode message z and w2 at the end of block b ＋ 2. Analysis results show that this new communication scheme can achieve the same Chong-Motani-Garg bounds and the decoding delay is only two blocks which is much shorter than that of backward decoding. Therefore, Chong-Motani-Garg bounds can be achieved by a forward decoding-based communication scheme with short decoding delay.
基金supported by the 2016 research fund of University of Ulsan
文摘In this paper, we propose and evaluate outage performance of a mixed amplify-and-forward(AF) and decode-and-forward(DF) relaying protocol in underlay cognitive radio. Different from the conventional AF and DF protocols, in the proposed protocol, a secondary source attempts to transmit its signal to a secondary destination with help of two secondary relays. One secondary relay always operates in AF mode, while the remaining one always operates in DF mode. Moreover, we also propose a relay selection method, which relies on the decoding status at the DF relay. For performance evaluation and comparison, we derive the exact and approximate closedform expressions of the outage probability for the proposed protocol over Rayleigh fading channel. Finally, we run Monte Carlo simulations to verify the derivations. Results presented that the proposed protocol obtains a diversity order of three and the outage performance of our scheme is between that of the conventional underlay DF protocol and that of the conventional underlay AF protocol.
文摘德州仪器(TI)最近推出两款可支持新型便携设备与家庭娱乐设备的混合信号视频解码器T V P 5 1 4 6、TVP51 50.这两款高性能视频解码器将NTSC、PAL及SECAM视频信号转换成数字分量视频信号,适用于便携、批量大、高质量和高性能的视频产品,如个人视频设备、数字电视、手持消费类电子产品及移动电话电视.
文摘This paper describes two single-chip——complex programmable logic devices/field programmable gate arrays(CPLD/FPGA)——implementations of the new advanced encryption standard (AES) algorithm based on the basic iteration architecture (design [A]) and the hybrid pipelining architecture (design [B]). Design [A] is an encryption-and-decryption implementation based on the basic iteration architecture. This design not only supports 128-bit, 192-bit, 256-bit keys, but saves hardware resources because of the iteration architecture and sharing technology. Design [B] is a method of the 2×2 hybrid pipelining architecture. Based on the AES interleaved mode of operation, the design successfully accomplishes the algorithm, which operates in the feedback mode (cipher block chaining). It not only guarantees security of encryption/decryption, but obtains high data throughput of 1.05 Gb/s. The two designs have been realized on Aitera′s EP20k300EBC652-1 devices.
基金Supported by the National High Technology Research and Development Programme of China(No.2009AAJ128,2009AAJ208,2010AA7010422)
文摘A hybrid decoding algorithm is proposed for nonbinary low-density parity-check （LDPC） codes, which combines the weighted symbol-flipping （WSF） algorithm with the fast Fourier trans- form q-ary sum-product algorithm （FFT-QSPA）. The flipped position and value are determined by the symbol flipping metric and the received bit values in the first stage WSF algorithm. If the low- eomplexity WSF algorithm is failed, the second stage FFT-QSPA is activated as a switching strategy. Simulation results show that the proposed hybrid algorithm greatly reduces the computational complexity with the performance close to that of FFT-QSPA.
