A novel fabrication process related to a smoothly wet chemical etching profile o f InP-based epitaxial layers in the crystal direction of [01for an InP-based monol ithic vertically integrated transmitter with an M...A novel fabrication process related to a smoothly wet chemical etching profile o f InP-based epitaxial layers in the crystal direction of [01for an InP-based monol ithic vertically integrated transmitter with an MQW laser diode and a heterojunction bipolar tran sistors driver circuit is described.A clear eye output diagram via an O/E converter is demonstrat ed und er a 1.25Gb/s non-return-zero pseudorandom code with a pattern length of 2 the integrated transmitter has a power dissipation of about 120mW with an optical output of 2dBm.展开更多
We propose and analyze a novel Si-based electro-optic modulator with an improved metal-oxide-semiconductor （MOS） capacitor configuration integrated into silicon-on-insulator （SOl）. Three gate-oxide layers embedded...We propose and analyze a novel Si-based electro-optic modulator with an improved metal-oxide-semiconductor （MOS） capacitor configuration integrated into silicon-on-insulator （SOl）. Three gate-oxide layers embedded in the silicon waveguide constitute a triple MOS capacitor structure, which boosts the modulation efficiency compared with a single MOS capacitor. The simulation results demonstrate that the Vπ Lπ product is 2. 4V · cm. The rise time and fall time of the proposed device are calculated to be 80 and 40ps from the transient response curve, respectively,indicating a bandwidth of 8GHz. The phase shift efficiency and bandwidth can be enhanced by rib width scaling.展开更多
Particle swarm optimization algorithm is presented for the layout of ＂Integrate Circuit （IC）＂ design. Particle swarm optimization based on swarm intelligence is a new evolutionary computational tool and is success...Particle swarm optimization algorithm is presented for the layout of ＂Integrate Circuit （IC）＂ design. Particle swarm optimization based on swarm intelligence is a new evolutionary computational tool and is successfully applied in function optimization, neural network design, classification, pattern recognition, signal processing and robot technology and so on. A modified algorithm is presented and applied to the layout of IC design. For a given layout plane, first of all, this algorithm generates the corresponding grid group by barriers and nets＇ ports with the thought ofgridless net routing, establishes initialization fuzzy matrix, then utilizes the global optimization character to find out the best layout route only if it exits. The results of model simulation indicate that PSO algorithm is feasible and efficient in IC layout design.展开更多
文摘A novel fabrication process related to a smoothly wet chemical etching profile o f InP-based epitaxial layers in the crystal direction of [01for an InP-based monol ithic vertically integrated transmitter with an MQW laser diode and a heterojunction bipolar tran sistors driver circuit is described.A clear eye output diagram via an O/E converter is demonstrat ed und er a 1.25Gb/s non-return-zero pseudorandom code with a pattern length of 2 the integrated transmitter has a power dissipation of about 120mW with an optical output of 2dBm.
文摘We propose and analyze a novel Si-based electro-optic modulator with an improved metal-oxide-semiconductor （MOS） capacitor configuration integrated into silicon-on-insulator （SOl）. Three gate-oxide layers embedded in the silicon waveguide constitute a triple MOS capacitor structure, which boosts the modulation efficiency compared with a single MOS capacitor. The simulation results demonstrate that the Vπ Lπ product is 2. 4V · cm. The rise time and fall time of the proposed device are calculated to be 80 and 40ps from the transient response curve, respectively,indicating a bandwidth of 8GHz. The phase shift efficiency and bandwidth can be enhanced by rib width scaling.
文摘Particle swarm optimization algorithm is presented for the layout of ＂Integrate Circuit （IC）＂ design. Particle swarm optimization based on swarm intelligence is a new evolutionary computational tool and is successfully applied in function optimization, neural network design, classification, pattern recognition, signal processing and robot technology and so on. A modified algorithm is presented and applied to the layout of IC design. For a given layout plane, first of all, this algorithm generates the corresponding grid group by barriers and nets＇ ports with the thought ofgridless net routing, establishes initialization fuzzy matrix, then utilizes the global optimization character to find out the best layout route only if it exits. The results of model simulation indicate that PSO algorithm is feasible and efficient in IC layout design.
