A fast-locking, low-jitter, phase-locked loop （PLL） with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short...A fast-locking, low-jitter, phase-locked loop （PLL） with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short locking time. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the same frequency and a phase shift of 45. The PLL is fabricated in 0. 1Stem CMOS technology. The measured phase noise of the PLL output at 500kHz offset from the 5GHz center frequency is - 102.6dBc/Hz. The circuit exhibits a capture range of 280MHz and a low RMS jitter of 2.06ps. The power dissipation excluding the output buffers is only 21.6roW at a 1.8V supply.展开更多
A low jitter phase-locked loop （PLL） that does not need analog resistors and capacitors is designed and fabrica- ted in a 90nm CMOS digital process. The metal parasitic capacitor is used in the PLL loop filter. Test...A low jitter phase-locked loop （PLL） that does not need analog resistors and capacitors is designed and fabrica- ted in a 90nm CMOS digital process. The metal parasitic capacitor is used in the PLL loop filter. Test results show that when the PLL is locked on 1. 989GHz, the RMS jitter is 3. 7977ps, the peak-to-peak jitter is 31. 225ps, and the power con- sumption is about 9mW. The locked output frequency range is from 125MHz to 2.7GHz.展开更多
This paper presents the design and the experimental measurements of two complementary metal-oxide-semiconductor (CMOS) LC-tuned voltage controlled oscillators (VCO) implemented in a 0.18 μm 6-metal-layer mixed-signal...This paper presents the design and the experimental measurements of two complementary metal-oxide-semiconductor (CMOS) LC-tuned voltage controlled oscillators (VCO) implemented in a 0.18 μm 6-metal-layer mixed-signal/RF CMOS technology. The design methodologies and approaches for the optimization of the ICs are presented. The first design is optimized for mixed-signal transistor, oscillated at 2.64 GHz with a phase noise of -93.5 dBc/Hz at 500 kHz offset. The second one optimized for RF transistor, using the same architecture, oscillated at 2.61 GHz with a phase noise of -95.8 dBc/Hz at 500 kHz offset. Under a 2 V supply, the power dissipation is 8 mW, and the maximum buffered output power for mixed-signal and RF transistor are -7 dBm and -5.4 dBm, respectively. Both kinds of oscillators make use of on-chip components only, allowing for simple and robust integration.展开更多
This paper introduces a 2.5GHz low phase-noise cross-coupled LC-VCO realized in 0.35μm SiGe BiCMOS technology. The conventional definition of a VCO operating regime is revised from a new perspective. Analysis shows t...This paper introduces a 2.5GHz low phase-noise cross-coupled LC-VCO realized in 0.35μm SiGe BiCMOS technology. The conventional definition of a VCO operating regime is revised from a new perspective. Analysis shows the importance of inductance and bias current selection for oscillator phase noise optimization. Differences between CMOS and BJT VCO design strategy are then analyzed and the conclusions are summarized. In this implementation, bonding wires form the resonator to improve the phase noise performance. The VCO is then integrated with other components to form a PLL frequency synthesizer with a loop bandwidth of 30kHz. Measurement shows a phase noise of - 95dBc/Hz at 100kHz offset and - 116dBc/Hz at 1MHz offset from a 2.5GHz carrier. At a supply voltage of 3V, the VCO core consumes 8mA. To our knowledge,this is the first differential cross-coupled VCO in SiGe BiCMOS technology in China.展开更多
An accurate 1.08GHz CMOS LC voltage-controlled oscillator is implemented in a 0.35μm standard 2P4M CMOS process.A new convenient method of calculating oscillator period is presented.With this period calculation tech...An accurate 1.08GHz CMOS LC voltage-controlled oscillator is implemented in a 0.35μm standard 2P4M CMOS process.A new convenient method of calculating oscillator period is presented.With this period calculation technique,the frequency tuning curves agree well with the experiment.At a 3.3V supply,the LC-VCO measures a phase noise of -82.2dBc/Hz at a 10kHz frequency offset while dissipating 3.1mA current.The chip size is 0.86mm×0.82mm.展开更多
A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced...A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced to reduce the chip size and to increase the bandwidth of operation.The procedure to design a MMIC VCO is also described here.The measured oscillating frequency of the MMIC VCO is 36±1.2GHz and the output power is 10±1dBm.The fabricated MMIC chip size is 1.3mm×1.0mm.展开更多
For enhancement-mode InGaP/A1GaAs/InGaAs PHEMTs,gate annealing is conducted between gate structures of Ti/Pt/Au and Pt/Ti/Pt/Au. Comparison is made after thermal annealing and an optimum annealing process is ob- taine...For enhancement-mode InGaP/A1GaAs/InGaAs PHEMTs,gate annealing is conducted between gate structures of Ti/Pt/Au and Pt/Ti/Pt/Au. Comparison is made after thermal annealing and an optimum annealing process is ob- tained. Using the structure of Ti/Pt/Au, about a 200mV positive shift of threshold voltage is achieved by thermal annea- ling at 320℃ for 40min in N2 ambient. Finally, a stable and consistent enhancement-mode PHEMT is produced successfully with higher threshold voltage.展开更多
A new type of isolator, the electrorheology (ER) isolator, is mainly described. Through theoretical analysis, a simplified physical model is established under some hypotheses and a series of motion equations are deduc...A new type of isolator, the electrorheology (ER) isolator, is mainly described. Through theoretical analysis, a simplified physical model is established under some hypotheses and a series of motion equations are deduced. According to the transmissibility curve simulation under different electric field strengths, the main factors influencing ER isolator’s working properties have been ascertained. Finally, it proves that ER isolator works well in both low and high frequency zones, it can decrease the force transmitted and enlarge the isolation frequency domain efficiently.展开更多
The paper takes a new campus project site of Shanxi university town for example, tests the influence of dynamic com- paction vibration and vibration isolation effect of isolation trench on this ground, and compares th...The paper takes a new campus project site of Shanxi university town for example, tests the influence of dynamic com- paction vibration and vibration isolation effect of isolation trench on this ground, and compares the influences of the dynamic compaction vibration on surrounding buildings with isolation trench and without it. Furthermore, the attenuation law of dy- namic compaction vibration in fill foundation of the loess area under different tamping energy and how to determine safe distance of dynamic compaction construction are studied. And then the quantitative relationship between acceleration and vibration source in new campus project site is presented. We derive the evaluation method that dynamic compaction construction affects adjacent buildings by contrasting with the existing standards and norms. The monitoring results show that isolation trench makes the amplitude attenuation of the horizontal velocity of dynamic compaction vibration reach above 75%, and the safe dis- tance be 30 m under the tamping energy of 6 000 kN · m. Therefore, isolation trench is better for vibration reduction under dynamic compaction construction.展开更多
Phase shifted converter realizes zero voltage switching (ZVS) with the use of leakage inductance of the main transformer, however, the realization of ZVS for lagging bridge leg is difficult. This paper proposes a c...Phase shifted converter realizes zero voltage switching (ZVS) with the use of leakage inductance of the main transformer, however, the realization of ZVS for lagging bridge leg is difficult. This paper proposes a current enhanced principle, and based on the principle, a novel phase shifted converter is proposed, which adds an auxi liary resonant net to the conventional full bridge converter to help the lagging bridge leg to realize ZVS. The principle and the design of the novel converter are analyzed, and the simulational and experimental results verify the principle.展开更多
A voltage controlled oscillator (VCO) which can generate 2 4GHz quadrature local oscillating (LO) signals is reported.It combines a LC VCO,realized by on chip symmetrical spiral inductors and differential diodes,an...A voltage controlled oscillator (VCO) which can generate 2 4GHz quadrature local oscillating (LO) signals is reported.It combines a LC VCO,realized by on chip symmetrical spiral inductors and differential diodes,and a two stage ring VCO.The principle of this VCO is demonstrated and further the phase noise is discussed in detail.The fabrication of prototype is demonstrated using 0 25μm single poly five metal N well salicide CMOS digital process.The reports show that the novel VCO is can generate quadrature LO signals with a tuning range of more than 300MHz as well as the phase noise--104 33dBc/Hz at 600KHz offset at 2 41GHz (when measuring only one port of differential outputs).In addition,this VCO can work in low power supply voltage and dissipate low power,thus it can be used in many integrated transceivers.展开更多
The monolithic integration of vertical-cavity surface-emitting lasers (VCSEL) with photodetectors is very important in the application of free-space optical interconnects.Theoretical and experimental results on the re...The monolithic integration of vertical-cavity surface-emitting lasers (VCSEL) with photodetectors is very important in the application of free-space optical interconnects.Theoretical and experimental results on the resonant-cavity-enhanced (RCE) photodetector with VCSEL Structure are presented.The compatible requirement in input mirror reflectivity between the VCSEL and the RCE detector is achieved by precisely etching the top mirror.In this way,the RCE detector with relatively high quantum efficiency and necessary optical bandwidth has been obtained.[KH8/9D]展开更多
This paper deals with the application of electrorheological fluid (ERF) in shock absorbers. Such shock absorbers (ERF shock absorbers) whose damping force is controlled Continuously and promptly through electric singn...This paper deals with the application of electrorheological fluid (ERF) in shock absorbers. Such shock absorbers (ERF shock absorbers) whose damping force is controlled Continuously and promptly through electric singnals, can be used in many kinds of mechanical equipment for vibration control. Typical structures of ERF shock absorbers are described and requirements for the ERF employed in shock absorbers are discussed. A new kind of shock absorber and its control system are presented and test results of the ERF shock absorber are given.展开更多
文摘A fast-locking, low-jitter, phase-locked loop （PLL） with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short locking time. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the same frequency and a phase shift of 45. The PLL is fabricated in 0. 1Stem CMOS technology. The measured phase noise of the PLL output at 500kHz offset from the 5GHz center frequency is - 102.6dBc/Hz. The circuit exhibits a capture range of 280MHz and a low RMS jitter of 2.06ps. The power dissipation excluding the output buffers is only 21.6roW at a 1.8V supply.
文摘A low jitter phase-locked loop （PLL） that does not need analog resistors and capacitors is designed and fabrica- ted in a 90nm CMOS digital process. The metal parasitic capacitor is used in the PLL loop filter. Test results show that when the PLL is locked on 1. 989GHz, the RMS jitter is 3. 7977ps, the peak-to-peak jitter is 31. 225ps, and the power con- sumption is about 9mW. The locked output frequency range is from 125MHz to 2.7GHz.
基金TheNationalHighTechnologyResearchandDevelopmentProgramofChina (863Program ) (No .2 0 0 2AA1Z160 0 )
文摘This paper presents the design and the experimental measurements of two complementary metal-oxide-semiconductor (CMOS) LC-tuned voltage controlled oscillators (VCO) implemented in a 0.18 μm 6-metal-layer mixed-signal/RF CMOS technology. The design methodologies and approaches for the optimization of the ICs are presented. The first design is optimized for mixed-signal transistor, oscillated at 2.64 GHz with a phase noise of -93.5 dBc/Hz at 500 kHz offset. The second one optimized for RF transistor, using the same architecture, oscillated at 2.61 GHz with a phase noise of -95.8 dBc/Hz at 500 kHz offset. Under a 2 V supply, the power dissipation is 8 mW, and the maximum buffered output power for mixed-signal and RF transistor are -7 dBm and -5.4 dBm, respectively. Both kinds of oscillators make use of on-chip components only, allowing for simple and robust integration.
文摘This paper introduces a 2.5GHz low phase-noise cross-coupled LC-VCO realized in 0.35μm SiGe BiCMOS technology. The conventional definition of a VCO operating regime is revised from a new perspective. Analysis shows the importance of inductance and bias current selection for oscillator phase noise optimization. Differences between CMOS and BJT VCO design strategy are then analyzed and the conclusions are summarized. In this implementation, bonding wires form the resonator to improve the phase noise performance. The VCO is then integrated with other components to form a PLL frequency synthesizer with a loop bandwidth of 30kHz. Measurement shows a phase noise of - 95dBc/Hz at 100kHz offset and - 116dBc/Hz at 1MHz offset from a 2.5GHz carrier. At a supply voltage of 3V, the VCO core consumes 8mA. To our knowledge,this is the first differential cross-coupled VCO in SiGe BiCMOS technology in China.
文摘An accurate 1.08GHz CMOS LC voltage-controlled oscillator is implemented in a 0.35μm standard 2P4M CMOS process.A new convenient method of calculating oscillator period is presented.With this period calculation technique,the frequency tuning curves agree well with the experiment.At a 3.3V supply,the LC-VCO measures a phase noise of -82.2dBc/Hz at a 10kHz frequency offset while dissipating 3.1mA current.The chip size is 0.86mm×0.82mm.
文摘A compact Ka-band monolithic microwave integrated circuit(MMIC) voltage controlled oscillator (VCO) with wide tuning range and high output power,which is based on GaAs PHEMT process,is presented.A method is introduced to reduce the chip size and to increase the bandwidth of operation.The procedure to design a MMIC VCO is also described here.The measured oscillating frequency of the MMIC VCO is 36±1.2GHz and the output power is 10±1dBm.The fabricated MMIC chip size is 1.3mm×1.0mm.
文摘For enhancement-mode InGaP/A1GaAs/InGaAs PHEMTs,gate annealing is conducted between gate structures of Ti/Pt/Au and Pt/Ti/Pt/Au. Comparison is made after thermal annealing and an optimum annealing process is ob- tained. Using the structure of Ti/Pt/Au, about a 200mV positive shift of threshold voltage is achieved by thermal annea- ling at 320℃ for 40min in N2 ambient. Finally, a stable and consistent enhancement-mode PHEMT is produced successfully with higher threshold voltage.
文摘A new type of isolator, the electrorheology (ER) isolator, is mainly described. Through theoretical analysis, a simplified physical model is established under some hypotheses and a series of motion equations are deduced. According to the transmissibility curve simulation under different electric field strengths, the main factors influencing ER isolator’s working properties have been ascertained. Finally, it proves that ER isolator works well in both low and high frequency zones, it can decrease the force transmitted and enlarge the isolation frequency domain efficiently.
基金Project of National Natural Science Fund for the Youth,China(No.51208473)The Key Project for Science and Technology of Shanxi,China(No.20130313010-3)
文摘The paper takes a new campus project site of Shanxi university town for example, tests the influence of dynamic com- paction vibration and vibration isolation effect of isolation trench on this ground, and compares the influences of the dynamic compaction vibration on surrounding buildings with isolation trench and without it. Furthermore, the attenuation law of dy- namic compaction vibration in fill foundation of the loess area under different tamping energy and how to determine safe distance of dynamic compaction construction are studied. And then the quantitative relationship between acceleration and vibration source in new campus project site is presented. We derive the evaluation method that dynamic compaction construction affects adjacent buildings by contrasting with the existing standards and norms. The monitoring results show that isolation trench makes the amplitude attenuation of the horizontal velocity of dynamic compaction vibration reach above 75%, and the safe dis- tance be 30 m under the tamping energy of 6 000 kN · m. Therefore, isolation trench is better for vibration reduction under dynamic compaction construction.
文摘Phase shifted converter realizes zero voltage switching (ZVS) with the use of leakage inductance of the main transformer, however, the realization of ZVS for lagging bridge leg is difficult. This paper proposes a current enhanced principle, and based on the principle, a novel phase shifted converter is proposed, which adds an auxi liary resonant net to the conventional full bridge converter to help the lagging bridge leg to realize ZVS. The principle and the design of the novel converter are analyzed, and the simulational and experimental results verify the principle.
文摘A voltage controlled oscillator (VCO) which can generate 2 4GHz quadrature local oscillating (LO) signals is reported.It combines a LC VCO,realized by on chip symmetrical spiral inductors and differential diodes,and a two stage ring VCO.The principle of this VCO is demonstrated and further the phase noise is discussed in detail.The fabrication of prototype is demonstrated using 0 25μm single poly five metal N well salicide CMOS digital process.The reports show that the novel VCO is can generate quadrature LO signals with a tuning range of more than 300MHz as well as the phase noise--104 33dBc/Hz at 600KHz offset at 2 41GHz (when measuring only one port of differential outputs).In addition,this VCO can work in low power supply voltage and dissipate low power,thus it can be used in many integrated transceivers.
文摘The monolithic integration of vertical-cavity surface-emitting lasers (VCSEL) with photodetectors is very important in the application of free-space optical interconnects.Theoretical and experimental results on the resonant-cavity-enhanced (RCE) photodetector with VCSEL Structure are presented.The compatible requirement in input mirror reflectivity between the VCSEL and the RCE detector is achieved by precisely etching the top mirror.In this way,the RCE detector with relatively high quantum efficiency and necessary optical bandwidth has been obtained.[KH8/9D]
文摘This paper deals with the application of electrorheological fluid (ERF) in shock absorbers. Such shock absorbers (ERF shock absorbers) whose damping force is controlled Continuously and promptly through electric singnals, can be used in many kinds of mechanical equipment for vibration control. Typical structures of ERF shock absorbers are described and requirements for the ERF employed in shock absorbers are discussed. A new kind of shock absorber and its control system are presented and test results of the ERF shock absorber are given.
