一个新的pMOSFET栅电流退化模型

研究了最大栅电流应力 (即 p MOSFET最坏退化情况 )下 p MOSFET栅电流的退化特性 .实验发现 ,在最大栅电流应力下 ,p MOSFET栅电流随应力时间会发生很大下降 ,而且在应力初期和应力末期栅电流的下降规律均会偏离公认的指数规律 .给出了所有这些现象的详细物理解释 ,并在此基础上提出了一种新的用于 p

复合Bi系超导多芯带材轴向荷载作用下的临界电流退化模型与分析

超导材料由于在外部载荷作用下表现出的超导性能退化效应严重制约了其工程实际应用。基于脆性纤维金属基增强复合材料损伤理论,应用Weibull分布函数建立了轴向荷载作用下的复合多芯Bi系超导带材的力学变形对临界电流影响的退化模型。给出了轴向加载和卸载过程超导带材临界电流随轴向应变的变化关系;并对超导带材不同初始损伤以及预应变情形下的临界电流随轴向应变的变化关系和退化进行了理论预测,能够给出与实验结果吻合良好的轴向应变对临界电流的退化影响。

300 MeV质子重离子加速器及电子器件单粒子效应试验研究

300 MeV质子重离子加速器主要用于模拟空间环境中高能粒子辐照,探索高能粒子与材料、器件以及生命体的相互作用机理。该加速器主要由离子源、直线加速器、注入线、同步加速器、引出线和3个实验终端组成。自2022年11月验收以来,该加速器已完成质子束、氦束、碳束、氪束、钽束、铋束、铀束等离子束的调试,相继开展了材料、电子器件、农作物种子、微生物、小鼠等样品的辐照试验,成为基础研究的实验平台。在基于该加速器的辐照试验平台中,开展了国产SiC功率MOSFET器件单粒子效应研究。300 MeV质子重离子加速器产生能量为1864.3 MeV的^(181)Ta^(31+)离子束,在经过钛窗和空气中传输后,达到SiC表面时LET值为80.7 MeV·cm^(2)·mg^(-1)。通过在SiC功率MOSFET器件漏极上施加不同偏置电压,对栅极和漏极泄漏电流检测分析,获取了在不同偏置条件下SiC MOSFET器件的漏电退化行为。

二代高温超导带材耐高温性能研究

通过有限元软件对由20层高温超导带材所制成的超导叠带在覆铝时的温度分布进行模拟,模拟结果表明在覆铝过程中两侧带材均会经历420℃以上的高温。对几种高温超导带材在不同温度和持续时间下,对其ReBCO侧、哈氏合金侧和双侧分别加热进行高温实验,测试得出了各带材临界电流的退化情况。实验结果表明,高温对带材造成了性能退化,不同样品的带材性能退化程度不同。

双极晶体管发射极电阻的提取方法及应用研究

以双多晶自对准互补双极器件中NPN双极晶体管为例,阐述了发射极电阻提取的基本原理和数学方法。在大电流情况下,NPN管的基极电流偏离理想电流是发射极串联电阻效应引起的。该提取方法综合考虑了辐照过程中NPN管的电流增益退化特性,分析了总剂量辐照效应对NPN管的损伤机理和模式。该提取方法适用于多晶硅发射极器件,也适用于SiGe HBT器件。

Unified Degradation Model in Low Gate Voltage Range During Hot-Carrier Stressing of p-MOS Transistors

Hot carrier effects of p MOSFETs with different oxide thicknesses are studied in low gate voltage range.All electrical parameters follow a power law relationship with stress time,but degradation slope is dependent on gate voltage.For the devices with thicker oxides,saturated drain current degradation has a close relationship with the product of gate current and electron fluence.For small dimensional devices,saturated drain current degradation has a close relationship with the electron fluence.This degradation model is valid for p MOSFETs with 0 25μm channel length and different gate oxide thicknesses.

Influence of Device Narrowing on HALO-pMOSFETs' Degradation Under V_g= V_d/2 Stress Mode

The degradation characteristics of both wide and narrow devices under V _g= V _d/2 stress mode is investigated.The width-enhanced device degradation can be seen with devices narrowing.The main degradation mechanism is interface state generation for pMOSFETs with different channel width.The cause of the width-enhanced device degradation is attributed to the combination of width-enhanced threshold voltage and series resistance.

Characterization of Oxide Charge During Hot-Carrier Degradation of Ultrathin Gate pMOSFETs--Investigated by Charge Pumping Technique

The generation of oxide charge for 4nm pMOSFETs under hot-carrier stress is investigated by the charge pumping measurements.Firstly,the direct experimental evidences of logarithmic time dependence of hole trapping is observed for pMOSFETs with different channel lengths under hot-carrier stress.Thus,the relationships of oxide charge generation,including electron trapping and hole trapping effects,with different stress voltages and channel lengths are analyzed.It is also found that there is a two-step process in the generation of oxide charge for pMOSFETs.For a short stress time,electron trapping is predominant,whereas for a long stress time,hole trapping dominates the generation of oxide charge.

A Method to Separate Effects of Oxide-Trapped Charge and Interface-Trapped Charge on Threshold Voltage in pMOSFETs Under Hot-Carrier Stress

A simple new method based on the measurement of charge pumping technique is proposed to separate and quantify experimentally the effects of oxide-trapped charges and interface-trapped charges on threshold voltage degradation in p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) under hot-carrier stress.Further,the experimental results verify the validness of this method.It is shown that,all three mechanisms of electron trapping effect,hole trapping effect and interface trap generation play important roles in p-channel MOSFETs degradation.It is noted that interface-trapped charge is still the dominant mechanism for hot-carrier-induced degradation in p-channel MOSFETs,while a significant contribution of oxide-trapped charge to threshold voltage is demonstrated and quantified.

0.20μm双埋氧SOI NMOSFET的自热效应

研究了一种新型双埋氧绝缘体上硅(DSOI)NMOSFET的自热效应(SHE)。通过实验测试并结合计算机数值模拟分析了SHE对DSOI NMOSFET输出特性的影响。仿真结果显示DSOI NMOSFET的背栅引出结构形成了额外的散热通道。重点研究了器件电压和环境温度对SHE的影响,结果表明随着漏极和栅极电压的增加,器件体区晶格温度升高,SHE增强;随着环境温度的升高,退化电流降低,SHE减弱。此外,重点分析了背栅偏置电压对器件SHE的影响,研究发现负的背栅偏置电压对全耗尽绝缘体上硅和DSOI NMOSFET的SHE均表现出抑制效果,且DSOI NMOSFET的背栅展现出了更好的抑制效果。

Effect of pulsed current on AZ31B magnesium sheets during annealing

The annealing tests heated by pulsed current(PC)or furnace for AZ31B magnesium sheets were carried out,and the effects of PC on the microstructure and dislocation density of the alloy were analyzed.The results show that PC strengthens the migration of boundaries,and then the twin grains,most of which distribute in the coarse grains,“spheroidize”to equiaxed grains,thus separating the coarse grains and refining the microstructure.This process homogenizes the initial microstructure and eliminate the typically lamellar twin grains.Moreover,PC also strengthens the dislocation annihilation.When the specimens were annealed by PC at 300℃for 4 min,the dislocation density was even lower than that annealed by furnaces at 400℃for 3 h before deformation.Furthermore,dislocation annihilation is enhanced with the increase of peak current density and the decrease of pulsed frequency.

Optimization and degradation of rubrene/C_(70) heterojunction solar cells

Small molecule organic solar cells （OSCs） with the structure of indium tin oxide （1TO）/molybdenum trioxide （MOO3） （5 nm）/rubrene （x nm）/fullerene （C70） （y nm）/2, 9-dimethyl-4, 7-diphenyl-1, 10-phenanthroline （BCP） （6 nm）/aluminum （A1） （150 nm） are fabricated. The thickness of active layer for the devices is investigated in details. The results show that the optimum thicknesses of rubrene layer and C70 layer are 30 nm and 25 nm, respectively. The degradation of the device is also investigated. The result indicates that the open-circuit voltage （Voo） does not change, while the short-circuit current density （Jsc）, fill factor （FF） and power conversion efficiency （PCE） decrease continuously with time. The degradation can be attributed to the oxygen in ambient diffusing and infiltrating into the active materials and reacting with C70 in cells, which can result in the increase of interfacial series resistance.