多电源域高速IO的片上模块化ESD防护器件

提出一种新颖的片上静电泄放(ESD)防护器件,该器件由N阱/P阱二极管、基于high-K金属栅CMOS工艺形成的二极管、寄生的晶闸管(SCR)和内嵌的电源钳位电路等几部分构成,具有多条ESD通路,能实现对单个IO管脚的PS-Mode、NS-Mode、PD-Mode、ND-Mode及DSMode共5种ESD应力模式的保护。本文分析了high-K工艺下各种SCR模块的结构和工作机制,通过合理配置这些SCR,该器件的一些关键ESD参数如触发电压、保持电压等能根据具体需要而调整,以满足片上系统(SoC)的多电源域的应用情况,利用传输线脉冲(TLP)、快速TLP和C-V等方式全方位验证了该器件的性能。结果表明,紧凑的结构、较少的互连线、较低的寄生电容、快速的响应能力使设计的器件适合高速IO接口电路的ESD防护。

多电源域集成电路静电放电试验方法研究

随着集成电路技术的发展,电路从原来的单一电源域向多电源域进行转移,而其中的静电放电(ESD)试验是考核集成电路性能的一项重要指标,如何有效选择合适的试验方法变得越来越重要。结合国内外相关静电放电试验标准,研究标准之间存在的相同和不同的地方。结合实际情况,探究多电源域集成电路静电放电试验方法的选择。

基于多电源域和自适应调压的SoC低功耗研究

针对当前片上系统(SoC)低功耗设计面临的挑战及对现有多种不同低功耗设计方法的对比分析,提出一种基于多电源域和自适应调压技术的综合多层次低功耗设计方法。通过低功耗设计,构建联合节能优化策略,调节多电源域下电压能力,简化电力数据信息收集流程,提升测算效率,研究分析自适应调压低功耗模式,以此有效提高电网使用频率,降低电源功耗,提升节能能力。实验结果表明,在正常模式下优化电路,实现总体功耗下降,降低了12.4%~58.3%,且不同模式下功耗仅为正常模式的0.4%~10.0%。

一款NoC总线的低功耗设计

随着集成电路技术的飞速发展,其集成度和复杂度越来越高,导致芯片功耗问题日益严重。文章提出一套兼容片上网络(Net on Chip,NoC)总线的功耗管理总线,针对不同电源域进行低功耗管理,通过电源域开关协议将电源域状态同步到事务活动,且不影响系统其他部分的操作。实验结果表明,功耗管理总线具有低成本、协议简单、兼容性好、轻量级等优势。

端口双向耐高压电路的ESD防护设计技术

随着CMOS工艺的快速发展,集成电路多电源域设计越来越普遍,电路全芯片ESD设计也越来越复杂。介绍了一款基于0.35μm CMOS工艺的32路抗辐射总线接口电路的ESD设计技术。同时,对双向耐高压输入管脚的ESD进行加固设计,提高了芯片的抗ESD能力。抗辐射32路总线接口电路通过了4.0 kV人体模型ESD测试,测试结果验证了该设计的有效性。

一种I2C异步低功耗唤醒电路

芯片设计中,为了降低芯片功耗,会将芯片划分为多个电源域。在芯片进入低功耗模式时,将不工作的电源域掉电,仅保留必须的电源域带电,达到降低芯片功耗的目的。芯片进入低功耗模式后,主机要和芯片通信,需要先将芯片退出低功耗模式,然后才能正常通信。I2C作为主机和芯片间常用的通信的接口,是一种常用的芯片退低功耗模式唤醒源。常用的I2C唤醒电路中,采用同步电路方式,需要额外的一个高频时钟,用来采样SDA和SCL信号,识别到I2C的起始信号后,唤醒芯片。这种同步唤醒电路,高频采样时钟在低功耗模式期间需要一直工作,增加了唤醒电路的功耗,同时由于只检测START信号,会存在误唤醒的情况。本文介绍了一种I2C异步唤醒电路,该电路不需要高频时钟,也可避免误唤醒的发生。

一种支持外部控制的动态电源管理方法

为降低微控制器(MCU)应用系统的功耗,节省硬件资源,提出了一种新型的动态电源管理方法。该动态电源管理方法在支持内部软件控制MCU系统内部电源域的基础上,扩展支持了外部设备对MCU系统内部电源域的控制;外部设备能够根据实际的应用场景实时通过通信电路对MCU系统内部电源域进行开启或关断控制;通信电路使用的通信端口与外部唤醒端口复用一个IO端口。仿真结果表明,对比传统门控时钟的低功耗方法,采用该动态电源管理方法在降低驱动电机的通用MCU系统的静态功耗方面有显著作用:在脉宽调制模块(PWM)稳定工作和待机状态时,系统总静态功耗分别降低了27.43%和98.18%。有效降低了MCU的系统功耗,节省了硬件资源,提高了对MCU内部电源域控制的灵活性和高效性。

地下位移三维测量系统低功耗设计

为了解决地下位移三维监测系统供电成本高的问题,文中从系统级和体系结构级等角度对地下位移三维测量系统进行低功耗设计,延长该系统的工作时间。为最大程度地降低该系统的功耗,分别从器件的选择、电路的硬件改进和多电源域等方面采取硬件低功耗措施。通过动态电源管理的方式对各模块进行分时分区供电的软件低功耗优化设计,实现该检测系统的低功耗设计,减少电池电量的消耗。实验结果表明,所设计系统的每个传感单元休眠时电流均降低至80μA,工作一个周期消耗的电量仅为0.00512 mA·h,相对于原系统减少20.95%,在无外部充电的情况下可连续工作约113天,满足在极端条件下长时间工作的需求。

一种面向多核DSP芯片的低功耗验证方法

随着芯片设计进入纳米时代,芯片的规模和工作频率不断提高,尤其在工艺发展到65nm及以下时,芯片的功耗已经成为继面积和性能之后的主要影响因素之一.面对低功耗设计技术要求的不断增加,对面向低功耗设计的仿真验证也提出了更高的要求.对此全面系统地介绍了低功耗设计的相关背景、原理和不同层次的优化技术,通过对一款多核DSP芯片的低功耗验证,针对低功耗设计的各种策略,构建了基于SystemVerilog的仿真验证环境,实现了一种高效可行的低功耗仿真验证方法.

Comparison of the time-domain electromagnetic field from an infinitesimal point charge and dipole source

An electromagnetic field is generated through the accelerating movement of two equal but opposite charges of a single dipole. An electromagnetic field can also be generated by a time-varying infinitesimal point charge. In this study, a comparison between the electromagnetic fields of an infinitesimal point charge and a dipole has been presented. First, the time-domain potential function of a point source in a 3D conductive medium is derived. Then the electric and magnetic fields in a 3D homogeneous lossless space are derived via the relation between the potential and field. The field differences between the infinitesimal point charge and the dipole in the step-off time, far-source, and near-source zones are analyzed, and the accuracy of the solutions from these sources is investigated. It is also shown that the field of the infinitesimal point charge in the near-source zone is different from that of the dipole, whereas the far-source zone fields of these two sources are identical. The comparison of real and simulated data shows that the infinitesimal point charge represents the real source better than the divole source.

一种用于数模混合DC/DC全芯片ESD防护技术

数模混合多电源域DC/DC转换器芯片具有工作电压高、供电电流大、输出短路保护等特点,其相应的电路结构复杂、数模信号混合、电源域多,因此其ESD防护设计成为了一个难题。本文从静电防护器件结构、多电源域静电设计、高低压隔离等多维度进行设计考量,基于0.35μm的BCD工艺,制定了全芯片ESD防护设计方案,通过数模混合多电源域DC/DC转换器芯片流片验证,显示该方案的HBM ESD防护等级达到2000 V。

用于16通道16位D/A转换器的全芯片ESD保护电路

ESD保护电路是保证集成电路可靠性的重要电路之一。具有较大芯片面积和较多电源域的集成电路给全芯片ESD保护电路的设计带来挑战。基于0.6μm CMOS工艺,设计了一种全芯片ESD保护电路,应用于5个电源域的16通道16位D/A转换器中。该D/A转换器的抗ESD能力大于2 000V,芯片尺寸为9mm×9mm。

28nm SoC芯片设计方法及流程实现

研究28nm SoC芯片的设计方法,探讨流程实现以及需要考虑的相关因素,重点在于设计中如何实现低功耗、高速度,并且在低功耗与高速度之间达到平衡,实现芯片的最佳设计。在设计中需要使用先进的设计流程以及严格的Sign-Off标准,同时,DFM保证芯片流片量产的成功以及稳定的良率。为实现低功耗,需要使用多个电源域(Power Domain)、门控时钟技术(Clock Gating)以及动态电压及频率调节(DVFS)等;为追求高速度,需要选择高速单元库(High Speed Library)和高速存储器(High Speed SRAM),尽量在关键路径使用LVT或ULVT。

一种新的低功耗高性能绘图芯片GPU设计方案

图形处理器(Graphics Process Unit,GPU)作为整个手机系统及芯片(System On Chip,SoC)的重要组成部分,除了具有提供高性能的图形图像处理能力之外,减少功耗也是移动平台图形处理器设计者们需要考虑的关键问题之一。在经典图形处理器芯片的基础上,一种新的低功耗高性能的图形绘制解决方案着重从架构层面解决功耗的问题。通过显卡驱动端的配合,将很多通用手机应用程序的三维绘制任务转换成低功耗绘制命令,绕开复杂的指令执行单元高效的完成绘制任务,同时通过将整个指令执行单元划分在独立的电源域,进行电源门控,将功耗大大降低。实验表明,对某些典型应用场景,新的解决方案最多可以节省50%的功耗。

SoC系统控制单元研究

总结SoC(System-On-Chip)系统中控制单元(CU)的设计和验证存在的问题,在系统集成的时候系统控制单元提供了时钟、复位、power domain相关等的控制,根据项目需求,这部分设计会发生很大变化。阐述其中的关键问题,对提高SoC系统控制单元的设计和验证具有参考意义。

Three-dimensional land FD-CSEM forward modeling using edge finite-element method

A modeling tool for simulating three-dimensional land frequency-domain controlled-source electromagnetic surveys,based on a finite-element discretization of the Helmholtz equation for the electric fields,has been developed.The main difference between our modeling method and those previous works is edge finite-element approach applied to solving the three-dimensional land frequency-domain electromagnetic responses generated by horizontal electric dipole source.Firstly,the edge finite-element equation is formulated through the Galerkin method based on Helmholtz equation of the electric fields.Secondly,in order to check the validity of the modeling code,the numerical results are compared with the analytical solutions for a homogeneous half-space model.Finally,other three models are simulated with three-dimensional electromagnetic responses.The results indicate that the method can be applied for solving three-dimensional electromagnetic responses.The algorithm has been demonstrated,which can be effective to modeling the complex geo-electrical structures.This efficient algorithm will help to study the distribution laws of3-D land frequency-domain controlled-source electromagnetic responses and to setup basis for research of three-dimensional inversion.

The Environmental Factors and Strategic Priorities in Northwest Power Development

Based on the energy distribution and economy status In the Northwest Region in China, this paper analyzes the probability of power sources complementation between Northwest Power Grid and the adjacent regional power grids, and points out that the strategic emphases for Northwest power development are to speed up 750 kV transmis-sion system construction, expand the Regional power market, rolling-develop hydrdpower stations on the Upper Yellow River, speed up thermal power bases construction and boost the interconnection between Northwest and North China, etc.

Flexible Control of Pulsed Power for Biomedical Applications Using PC

This work aims to control pulsed power for biomedical fields, which demands sensitive parameters. The pulsed power consists of a voltage rise time of less than 50 ns and charging energy to 1.0 J/pulse; also, the pulse control area includes pulse interval pulse shot number, output voltage. To achieve this system, a pulsed power system exists including software running on PC, universal serial bus （UgB~ for connection, and FPGA controller. Using the software for complex control of pulsed power will enable expansion into various fields with easy operation.

Maps of International Research Collaboration in Clean Energy

Clean energy is the most promising technology for sustainable growth. The development of clean energy requires a considerable amount of R ＆ D （research ＆ development） expenditure and various core technologies, and therefore, international research collaboration is necessary for prompt and efficient development. The study is aimed at establishing a knowledge base that can help to prepare international research collaboration policies for solving global challenges effectively. The authors demonstrate the research capacity and international research collaboration in solar cell and fuel cell technologies, using global research network diagrams gathered from 35,322 and 33,136 academic papers, respectively. The diagrams include the data of research competency and co-authorship. More than 6,000 institutions and 100 countries are involved in each field. Based on the diagrams, the technologies are compared and international collaboration is analyzed. A valley of research collaboration in Asia is identified for both technologies. Then, science and education policies that influence the structures are discussed.

Evaluation of Loss of Load Probability and Expected Energy Generation in Multi-area Interconnected Systems with Wind Generating Units

Due to randomness of wind generator＇s availability, power system planners have big concern on EEG （expected energy generation） and system reliability of power system with wind generators. This paper presents a methodology to evaluate the EEG as well as overall LOLP （loss of load probability）, which is an index for system reliability of multi-area interconnected systems with wind generators, as well as conventional fossil fuel based generating units. The proposed model is also capable of tracking the energy export incorporating the multi-state probability model for wind generator which output varies with time and season.