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放大电路和LC正弦波振荡电路的电路组态 被引量:1
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作者 廖伟盛 《嘉应大学学报》 1998年第6期17-19,共3页
1 问题的提出 对于晶体管放大电路,人们将其区分为共射、共基和共集三种不同电路组态,振荡电路是一个具有正反馈的放大电路,因而使人们想到,如果将振荡电路也区分为共射、共基和共集三种电路组态,岂不是可以将分析电路组态不同的三种放... 1 问题的提出 对于晶体管放大电路,人们将其区分为共射、共基和共集三种不同电路组态,振荡电路是一个具有正反馈的放大电路,因而使人们想到,如果将振荡电路也区分为共射、共基和共集三种电路组态,岂不是可以将分析电路组态不同的三种放大电路所得的结论, 展开更多
关键词 放大电路 LC正弦波振荡电路 电路组态 能量关系 信号源 组态划分
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晶体管组态电路的噪声谱矩阵计算及噪声比性能比较
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作者 王桂芹 戴宏亮 《数据采集与处理》 CSCD 1998年第a10期9-13,共5页
采用谱矩阵方法,推导了了三种电路组态的噪声谱矩阵关系,从而完整、准确地比较了晶体管三种电路组态的噪声性能。理论分析及仿真计算表明,不同组态电路在一般情况下虽然差异较小,但在高频范围,特别是当器件工作在小电流情况下,噪... 采用谱矩阵方法,推导了了三种电路组态的噪声谱矩阵关系,从而完整、准确地比较了晶体管三种电路组态的噪声性能。理论分析及仿真计算表明,不同组态电路在一般情况下虽然差异较小,但在高频范围,特别是当器件工作在小电流情况下,噪声性能判别会增加。 展开更多
关键词 晶体管电路 噪声谱 矩阵 噪声性能 电路组态
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Research of the test generation algorithm based on search state dominance for combinational circuit
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作者 吴丽华 俞红娟 +1 位作者 王轸 马怀俭 《Journal of Harbin Institute of Technology(New Series)》 EI CAS 2006年第1期62-64,共3页
On the basis of EST (Equivalent STate hashing) algorithm, this paper researches a kind of test generation algorithm based on search state dominance for combinational circuit. According to the dominance relation of the... On the basis of EST (Equivalent STate hashing) algorithm, this paper researches a kind of test generation algorithm based on search state dominance for combinational circuit. According to the dominance relation of the E-frontier (evaluation frontier), we can prove that this algorithm can terminate unnecessary searching step of test pattern earlier than the EST algorithm through some examples, so this algorithm can reduce the time of test generation. The test patterns calculated can detect faults given through simulation. 展开更多
关键词 E-frontier test generation combinational circuit
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基于智能逻辑模块的排风机组控制系统设计
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作者 王鸿康 《电气传动自动化》 2014年第1期40-43,60,共5页
介绍基于智能逻辑模块LOGO!的仓库排风机组控制系统设计,3台排风机分组运行,可按照室温自动调节投运组的风机数,依次轮换接入组,故障排风机切除,备用排风机投入。电路程序设计满足系统功能要求,显示操作界面友好、易于维护,外围电路简单... 介绍基于智能逻辑模块LOGO!的仓库排风机组控制系统设计,3台排风机分组运行,可按照室温自动调节投运组的风机数,依次轮换接入组,故障排风机切除,备用排风机投入。电路程序设计满足系统功能要求,显示操作界面友好、易于维护,外围电路简单,低成本。 展开更多
关键词 控制策略 电路程序设计与组态 智能逻辑模块LOGO! 消息显示
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Analysis of process variations impact on the single-event transient quenching in 65 nm CMOS combinational circuits 被引量:2
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作者 WANG TianQi XIAO LiYi +1 位作者 ZHOU Bin QI ChunHua 《Science China(Technological Sciences)》 SCIE EI CAS 2014年第2期322-331,共10页
Single-event transient pulse quenching (Quenching effect) is employed to effectively mitigate WSET (SET pulse width). It en- hanced along with the increased charge sharing which is norm for future advanced technol... Single-event transient pulse quenching (Quenching effect) is employed to effectively mitigate WSET (SET pulse width). It en- hanced along with the increased charge sharing which is norm for future advanced technologies. As technology scales, param- eter variation is another serious issue that significantly affects circuit's performance and single-event response. Monte Carlo simulations combined with TCAD (Technology Computer-Aided Design) simulations are conducted on a six-stage inverter chain to identify and quantify the impact of charge sharing and parameter variation on pulse quenching. Studies show that charge sharing induce a wider WSET spread range. The difference of WSET range between no quenching and quenching is smaller in NMOS (N-Channel Metal-Oxide-Semiconductor Field-Effect Transistor) simulation than that in PMOS' (P-Channel Met- N-Oxide-Semiconductor Field-Effect Transistor), so that from parameter variation view, quenching is beneficial in PMOS SET mitigation. The individual parameter analysis indicates that gate oxide thickness (TOXE) and channel length variation (XL) mostly affect SET response of combinational circuits. They bring 14.58% and 19.73% average WSET difference probabilities for no-quenching cases, and 105.56% and 123.32% for quenching cases. 展开更多
关键词 single-event transient (SET) parameter variation Monte Carlo simulation quenching effect charge share
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