A 1 ：2 demultiplexer is designed and realized in standard 0. 18μm CMOS technology. A novel high-speed and low-voltage latch is used to realize the core circuit cell. Compared to the traditional source-coupled FET lo...A 1 ：2 demultiplexer is designed and realized in standard 0. 18μm CMOS technology. A novel high-speed and low-voltage latch is used to realize the core circuit cell. Compared to the traditional source-coupled FET logic structure latch, its power supply voltage is lower and the speed is faster. In addition, the negative feedback is used in the buffer circuit to widen its bandwidth. Measurement results show that the chip can work at the data rate of 20Gb/ s. The supply voltage is 1.8V and the current,including the buffer circuit, is 72mA.展开更多
Oscillator IC technique is developed by combining injecting synchronization technique with a ring VCO.Using the technique,a novel 2 488GHz of monolithical integrated injected synchronized ring VCO (ISRVCO) is realize...Oscillator IC technique is developed by combining injecting synchronization technique with a ring VCO.Using the technique,a novel 2 488GHz of monolithical integrated injected synchronized ring VCO (ISRVCO) is realized in a standard 0 25μm CMOS process.The ISRVCO is characterized by the following performances: -100dBc /Hz@1MHz at free running frequency,-91 7dBc/Hz@10kHz when injection is locked.With the 3 3V of power supply,the tuning range is 150MHz and the locking range is 100MHz with 50m V p p signal injection.展开更多
In order to realize the fault diagnosis of the control circuit of all-electronic computer interlocking system(ACIS)for railway signals,taking a five-wire switch electronic control module as an research object,we propo...In order to realize the fault diagnosis of the control circuit of all-electronic computer interlocking system(ACIS)for railway signals,taking a five-wire switch electronic control module as an research object,we propose a method of selecting the sample set of the basic classifier by roulette method and realizing fault diagnosis by using SVM-AdaBoost.The experimental results show that the proportion of basic classifier samples affects classification accuracy,which reaches the highest when the proportion is 85%.When selecting the sample set of basic classifier by roulette method,the fault diagnosis accuracy is generally higher than that of the maximum weight priority method.When the optimal proportion 85%is taken,the accuracy is highest up to 96.3%.More importantly,this way can better adapt to the critical data and improve the anti-interference ability of the algorithm,and therefore it provides a basis for fault diagnosis of ACIS.展开更多
文摘A 1 ：2 demultiplexer is designed and realized in standard 0. 18μm CMOS technology. A novel high-speed and low-voltage latch is used to realize the core circuit cell. Compared to the traditional source-coupled FET logic structure latch, its power supply voltage is lower and the speed is faster. In addition, the negative feedback is used in the buffer circuit to widen its bandwidth. Measurement results show that the chip can work at the data rate of 20Gb/ s. The supply voltage is 1.8V and the current,including the buffer circuit, is 72mA.
文摘Oscillator IC technique is developed by combining injecting synchronization technique with a ring VCO.Using the technique,a novel 2 488GHz of monolithical integrated injected synchronized ring VCO (ISRVCO) is realized in a standard 0 25μm CMOS process.The ISRVCO is characterized by the following performances: -100dBc /Hz@1MHz at free running frequency,-91 7dBc/Hz@10kHz when injection is locked.With the 3 3V of power supply,the tuning range is 150MHz and the locking range is 100MHz with 50m V p p signal injection.
基金Natural Science Foundation of Gansu Province(Nos.18JR3RA130,2018C-11,2018A-022)Science Fund of Lanzhou Jiaotong University(No.2017022)。
文摘In order to realize the fault diagnosis of the control circuit of all-electronic computer interlocking system(ACIS)for railway signals,taking a five-wire switch electronic control module as an research object,we propose a method of selecting the sample set of the basic classifier by roulette method and realizing fault diagnosis by using SVM-AdaBoost.The experimental results show that the proportion of basic classifier samples affects classification accuracy,which reaches the highest when the proportion is 85%.When selecting the sample set of basic classifier by roulette method,the fault diagnosis accuracy is generally higher than that of the maximum weight priority method.When the optimal proportion 85%is taken,the accuracy is highest up to 96.3%.More importantly,this way can better adapt to the critical data and improve the anti-interference ability of the algorithm,and therefore it provides a basis for fault diagnosis of ACIS.
