A compact direct digital frequency synthesizer （DDFS） for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase...A compact direct digital frequency synthesizer （DDFS） for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase to sine mapping data is compressed using sine symmetry technique, sine-phase difference technique, quad line approximation technique,and quantization and error read only memory （QE-ROM） technique. The ROM size is reduced by 98% using these techniques. A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process. The core area of the DDFS is 1.6mm^2. It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.展开更多
文摘为了研究平、竖曲线路段绿化植物的防眩效果,提出了平直路段防眩植物株距和高度的计算方法,并计算了不同植物冠径和防眩角条件下的株距,以及不同道路横断面和交通组成条件下的防眩植物高度.对平曲线路段,提出了改进的防眩植物株距计算方法,计算了防眩角修正值;对竖曲线路段,提出了改进的防眩植物高度计算方法,计算了凹曲线路段防眩植物高度增高值,提出了凸曲线植物下沿防眩改善措施.研究结果表明：相对平直路段,平曲线路段防眩植物株距应减小0.3～3.8 m;凹曲线路段防眩植物高度应增加0.03～0.43 m.
文摘A compact direct digital frequency synthesizer （DDFS） for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase to sine mapping data is compressed using sine symmetry technique, sine-phase difference technique, quad line approximation technique,and quantization and error read only memory （QE-ROM） technique. The ROM size is reduced by 98% using these techniques. A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process. The core area of the DDFS is 1.6mm^2. It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.
