针对IEEE 802.11ac"利用前导序列符号+梳状导频"的帧结构,推导出基于最大似然估计的校正方案性能评估公式。基于该公式分析了导频位置选择、信道衰落及子载波间相关性对校正性能的影响。提出了一种信令交换方式,可以实现收发...针对IEEE 802.11ac"利用前导序列符号+梳状导频"的帧结构,推导出基于最大似然估计的校正方案性能评估公式。基于该公式分析了导频位置选择、信道衰落及子载波间相关性对校正性能的影响。提出了一种信令交换方式,可以实现收发端优化导频位置同步,并根据信道响应的幅度信息,设计了一种低复杂度的导频位置优化的方案,能够在保证性能不损失的情况下,节省导频开销。仿真与实测的结果显示,对于理想瑞利信道数据,校正性能在信道幅度信息未知和已知的情况下分别提升1.85 d B和7.15 d B;对于实测信道数据,则分别提升1.67 d B和2.68 d B。展开更多
A novel method to partially compensate sigma-delta shaped noise is proposed. By injecting the compensation current into the passive loop filter during the delay time of the phase frequency detector（PFD）,a maximum re...A novel method to partially compensate sigma-delta shaped noise is proposed. By injecting the compensation current into the passive loop filter during the delay time of the phase frequency detector（PFD）,a maximum reduction of the phase noise by about 16dB can be achieved. Compared to other compensation methods,the technique proposed here is relatively simple and easy to implement. Key building blocks for realizing the noise cancellation,including the delay variable PFD and compensation current source, are specially designed. Both the behavior level and circuit level simulation results are presented.展开更多
文摘针对IEEE 802.11ac"利用前导序列符号+梳状导频"的帧结构,推导出基于最大似然估计的校正方案性能评估公式。基于该公式分析了导频位置选择、信道衰落及子载波间相关性对校正性能的影响。提出了一种信令交换方式,可以实现收发端优化导频位置同步,并根据信道响应的幅度信息,设计了一种低复杂度的导频位置优化的方案,能够在保证性能不损失的情况下,节省导频开销。仿真与实测的结果显示,对于理想瑞利信道数据,校正性能在信道幅度信息未知和已知的情况下分别提升1.85 d B和7.15 d B;对于实测信道数据,则分别提升1.67 d B和2.68 d B。
文摘A novel method to partially compensate sigma-delta shaped noise is proposed. By injecting the compensation current into the passive loop filter during the delay time of the phase frequency detector（PFD）,a maximum reduction of the phase noise by about 16dB can be achieved. Compared to other compensation methods,the technique proposed here is relatively simple and easy to implement. Key building blocks for realizing the noise cancellation,including the delay variable PFD and compensation current source, are specially designed. Both the behavior level and circuit level simulation results are presented.
