固相振荡燃烧模型的非线性化学动力学分析

本文建立了Ｃ６Ｈ１２Ｎ６＋ＫＣｌＯ４＋Ｍｇ＋ＳｒＳＯ４固相振荡燃烧体系的非吸热三变量立方自催化化学模型，应用非线性数学分析方法，研究了固相振荡的化学动力学机理，并对此进行了数值模拟，结果反映了这一振荡燃烧体系所具有的非线性化学动力学特性。

场效应管RC移相振荡器的非线性振荡理论

籍助非线性振荡理论，对场效应管ＲＣ移相振荡器的工作过程进行了分析，得到了产生稳定振荡的工作条件．

固相振荡燃烧模型的动力学分析及混沌控制

根据固相振荡燃烧模型的动力学方程,揭示了系统随自身参数λ变化的动力学行为及混沌现象,并用棒棒控制法和多变量注入反馈控制法对系统进行了控制。数值仿真结果显示,随着系统参数的逐渐减小,系统处于周期二运动轨道,当参数进一步减小时,系统发生倍化分岔,最终通过倍化分岔序列通向混沌,当参数继续减小时,系统从混沌态转化为周期运动。棒棒控制法和多变量注入反馈控制法都能将系统控制到稳定的单周期轨道,只是控制后单周期的相轨迹图不同。系统随多变量注入反馈控制法控制参数变化时,其动力学行为与系统随自身参数变化的动力学行为很相似。本文工作进一步揭示了固相振荡燃烧模型的动力学行为,给出了该模型混沌控制的参数依据,为该模型进一步工程应用奠定了理论基础。

RC移相式振荡器的研究

在研究RC移相电路的基础上,推导了分立和集成移相式RC振荡器的振荡条件和振荡频率公式,指出了超前和滞后移相式RC振荡器计算公式的细微差别.

梯形电路在RC移相式振荡电路中的应用

目前RC 移相式振荡电路在振荡频率固定且对波形要求不高的一些电子设备中仍占有相当比重.但是对缺乏相关电路及信号系统知识的初学者而言,求其振荡频率及振荡条件竟成为一道难题.如果能适时地引入梯形电路的简单介绍,则RC 移相式振荡电路的振荡频率及振荡条件可以容易地求出.

CSRm变谐波加速

在研究兰州重离子冷却储存环(HIRFLCSR)纵向相振荡运动特性的基础上,对主环(CSRm)内重离子的加速过程进行了模拟研究。选取由扇聚焦回旋加速器(SFC)剥离注入的能量为7MeV/u,动量散度为±0.5%的12C6+典型离子,模拟了CSRm内束流的加速过程,加速的最终能量为1GeV/u。在加速过程中采用了变换谐波的方式,解决了较低能量下的加速问题。模拟结果给出了不同时刻粒子在纵向相空间的分布以及各主要高频参数随时间的变化曲线。

Design and implementation of digital closed-loop drive control system of a MEMS gyroscope

In order to effectively control the working state of the gyroscope in drive mode, the drive characteristics of the micro electromechanical system （MEMS） gyroscope are analyzed in principle. A novel drive circuit for the MEMS gyroscope in digital closed-loop control is proposed, which utilizes a digital phase-locked loop （PLL） in frequency control and an automatic gain control （AGC） method in amplitude control. A digital processing circuit with a field programmable gate array （FPGA） is designed and the experiments are carried out. The results indicate that when the temperature changes, the drive frequency can automatically track the resonant frequency of gyroscope in drive mode and that of the oscillating amplitude holds at a set value. And at room temperature, the relative deviation of the drive frequency is 0.624 ×10^-6 and the oscillating amplitude is 8.0 ×10^-6, which are 0. 094% and 18. 39% of the analog control program, respectively. Therefore, the control solution of the digital PLL in frequency and the AGC in amplitude is feasible.

A low-phase-noise and low-power crystal oscillator for RF tuner

A 37. 5 MHz differential complementary metal oxide semiconductor （CMOS） crystal oscillator with low power and low phase noise for the radio frequency tuner of digital radio broadcasting digital radio mondiale （DRAM） and digital audio broadcasting （DAB） systems is realized and characterized. The conventional cross-coupled n-type metal oxide semiconductor （NMOS） transistors are replaced by p-type metal oxide semiconductor （PMOS） transistors to decrease the phase noise in the core part of the crystal oscillator. A symmetry structure of the current mirror is adopted to increase the stability of direct current. The amplitude detecting circuit made up of a single- stage CMOS operational transconductance amplifier （OTA） and a simple amplitude detector is used to improve the current accuracy of the output signals. The chip is fabricated in a 0. 18- pxn CMOS process, and the total chip size is 0. 35 mm x 0. 3 mm. Under a supply voltage of 1.8 V, the measured power consumption is 3.6 mW including the output buffer for 50 testing loads. The proposed crystal oscillator exhibits a low phase noise of - 134. 7 dBc/Hz at 1-kHz offset from the center frequency of 37. 5 MHz.

A 2.4GHz Quadrature Output Frequency Synthesizer

A design and implementation for a 2.4GHz quadrature output frequency synthesizer intended for bluetooth in 0. 35μm CMOS technology are presented. A differentially controlled quadrature voltage-controlled oscillator （QVCO） is employed to generate quadrature （I/Q） signals. A second-order loop filter, with a unit gain transconductance amplifier having the performance of a third-order loop filter,is exploited for low cost. The measured spot phase noise is -106.15dBc/Hz@ 1MHz. Close-in phase noise is less than -70dBc/Hz. The synthesizer consumes 13.5mA under a 3.3V voltage supply. The core size is 1.3mm×0. 8mm.

振荡流热管振荡相变传热特性

本文建立了环路型振荡流热管物理数学模型。数值计算结果表明,汽泡的交替膨胀和压缩使管内工质维持振荡运动,热管冷却端的散热情况是影响振荡流热管内部振荡运动的重要因素。热管内部振荡运动受倾角、充液率和加热功率影响,其变化趋势与前期实验结果基本一致。热管内脉动运动愈剧烈,热管的传热性能愈好。

gGaS_2单晶生长与完整性研究

采用二温区气相输运温度振荡方法合成了高纯单相致密的AgGaS2 多晶 ,计算出晶格常数a=5.7535nm ,c =10 .30 0 8nm ,以及S原子位置x =0 .2 79,与PDF值相差很小 ,表明其是高质量的多晶原料。以此为原料用改进Bridgman法生长出直径 15mm长度 30mm的单晶体 ,经外形观测、解理试验和X射线衍射分析表明其是结晶完整的单晶体。

Fast-Lock Low-Jitter PLL with a Simple Phase-Frequency Detector

A fast-locking, low-jitter, phase-locked loop （PLL） with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short locking time. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the same frequency and a phase shift of 45. The PLL is fabricated in 0. 1Stem CMOS technology. The measured phase noise of the PLL output at 500kHz offset from the 5GHz center frequency is - 102.6dBc/Hz. The circuit exhibits a capture range of 280MHz and a low RMS jitter of 2.06ps. The power dissipation excluding the output buffers is only 21.6roW at a 1.8V supply.

A Low Jitter PLL in a 90nm CMOS Digital Process

A low jitter phase-locked loop （PLL） that does not need analog resistors and capacitors is designed and fabrica- ted in a 90nm CMOS digital process. The metal parasitic capacitor is used in the PLL loop filter. Test results show that when the PLL is locked on 1. 989GHz, the RMS jitter is 3. 7977ps, the peak-to-peak jitter is 31. 225ps, and the power con- sumption is about 9mW. The locked output frequency range is from 125MHz to 2.7GHz.

Wideband CMOS LC VCO design and phase noise analysis

A wideband LC cross-coupled voltage controlled oscillator（VCO） is designed and realized with standard 0. 18 μm complementary metal-oxide-semiconductor（CMOS） technology. Band switching capacitors are adopted to extend the frequency tuning range, and the phase noise is optimized in the design procedure. The functional relationships between the phase noise and the transistors＇ width-length ratios are deduced by a linear time variant （LTV） model. The theoretical optimized parameter value ranges are determined. To simplify the calculation, the working region is split into several sub-ranges according to transistor working conditions. Thus, a lot of integrations are avoided, and the phase noise function upon the design variables can be expressed as simple proportion formats. Test results show that the DC current is 8.8 mA under a voltage supply of 1.8 V; the frequency range is 1.17 to 1.90 GHz, and the phase noise reaches - 83 dBc/Hz at a 10 kHz offset from the carrier. The chip size is 1. 2 mm × 0. 9 mm.

A 5-Gbit/s monolithically-integrated low-power clock recovery circuit in 0.18-μm CMOS

In order to make a 10 Gbit/s 2：1 half-rate multiplexer operate without external clocks, a 5 Gbit/s clock recovery （CR） circuit is needed to extract the desired clock from one input data. For the CR circuit, a 3-stage ring voltage-controlled oscillator （VCO） is employed to avoid an unreliable startup of a 2-stage VCO and a low oscillation frequency of a 4-stage VCO. A phase frequency detector （PFD） is used to expand the pull-in range to meet the wide tuning range of a VCO required by process-voltage-temperature （PVT） variation. SMIC 0. 18-μm CMOS technology is adopted and the core area is 170 μm ×270 μm. Measurements show that, under a 1.8 V supply voltage, it consumes only about 90 mW, and has an input sensitivity of less than 25 mV, an output single-ended swing of above 300 mV, a phase noise of - 114 dBc/Hz at 1 MHz offset and a pull-in range of 1 GHz.

A 2GHz Low Power Differentially Tuned CMOS Monolithic LC-VCO

A 2GHz differentially tuned CMOS monolithic LC-VCO is designed and fabricated in a 0.18μm CMOS process. The VCO has a 16.15% tuning range （from 1. 8998 to 2. 2335GHz） through a combination of analog and digital tuning techniques （4-bit binary switch-capacitor array）. The measured phase noise is - 118.17dBc/Hz at a 1MHz offset from a 2. 158GHz carrier. With the presented improved switch,the phase noise varies no more than 3dB at different digital control bits. The phase noise changes only by about 2dB in the tuning range because of the pn-junctions as the varactors. The VCO draws a current of about 2. lmA from a 1.8V power supply and works normally with a 1.5V power supply.

Low Phase Noise Quadrature Oscillators Using New Injection Locked Technique

A low phase noise quadrature oscillator using the new injection locked technique is proposed. The incident signal is directly injected into the common-source connection of the sub-harmonic oscillator. In principle, the phase noise performance of the quadrature output is better than the sub-harmonic oscillator itself. The quadrature oscillator is implemented in a 0. 25μm CMOS process. Measurements show the proposed oscillator could achieve a phase noise of --130dBc/Hz at 1MHz offset from 1. 13GHz carrier while only drawing an 8.0mA current from the 2.5V power supply.

Design of a 2.5GHz Low Phase-Noise LC-VCO in 0.35μm SiGe BiCMOS

This paper introduces a 2.5GHz low phase-noise cross-coupled LC-VCO realized in 0.35μm SiGe BiCMOS technology. The conventional definition of a VCO operating regime is revised from a new perspective. Analysis shows the importance of inductance and bias current selection for oscillator phase noise optimization. Differences between CMOS and BJT VCO design strategy are then analyzed and the conclusions are summarized. In this implementation, bonding wires form the resonator to improve the phase noise performance. The VCO is then integrated with other components to form a PLL frequency synthesizer with a loop bandwidth of 30kHz. Measurement shows a phase noise of - 95dBc/Hz at 100kHz offset and - 116dBc/Hz at 1MHz offset from a 2.5GHz carrier. At a supply voltage of 3V, the VCO core consumes 8mA. To our knowledge,this is the first differential cross-coupled VCO in SiGe BiCMOS technology in China.

Multisim在正弦波信号产生电路教学中的应用

电子技术课程的一大特点就是内容相对抽象,学生在学习过程中不容易快速理解,需要花费大量的课外时间继续巩固,使得教学效果一般。Multisim是一个专门用于电子线路仿真与设计的EDA工具软件,在教学过程中加入虚拟现实的仿真教学环节,有利于学生迅速掌握课程中的抽象内容,提高教学质量。本文重点分析论述了Multisim在电子技术教学内容RC基本文氏桥振荡电路、RC移相式振荡器、RC双T反馈式振荡器等的具体应用。