A fast-locking, low-jitter, phase-locked loop (PLL) with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short...A fast-locking, low-jitter, phase-locked loop (PLL) with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short locking time. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the same frequency and a phase shift of 45. The PLL is fabricated in 0. 1Stem CMOS technology. The measured phase noise of the PLL output at 500kHz offset from the 5GHz center frequency is - 102.6dBc/Hz. The circuit exhibits a capture range of 280MHz and a low RMS jitter of 2.06ps. The power dissipation excluding the output buffers is only 21.6roW at a 1.8V supply.展开更多
A new method for the control of the speed of an ultrasonic motor and its implementation are proposed. The method is merely used by detecting the time when motor′s monitor signal reaches a non zero reference valu...A new method for the control of the speed of an ultrasonic motor and its implementation are proposed. The method is merely used by detecting the time when motor′s monitor signal reaches a non zero reference value than a zero one, the direction, in which the driving frequency of the motor should be shifted, can be promptly calculated. With the aid of a CPU and the phase locked frequency doubling technique, the motor can be steadily driven in a wide range of frequency and the optimum frequency can be captured rapidly and precisely. Experiment shows that the above method is available.展开更多
The application areas of conventional push pull converters are limited because of high voltage stress of switches (twice of input voltage). This paper presents a novel zero voltage and zero current switching (ZCS)...The application areas of conventional push pull converters are limited because of high voltage stress of switches (twice of input voltage). This paper presents a novel zero voltage and zero current switching (ZCS) PWM push pull three level converter in which the voltage stress of switches is input voltage. With phase shifted modulation strategy, the leading switches can only realize zero voltage switching (ZVS), and the lagging switches can realize ZCS when block capacitor and block diodes are added. Using the strategy, the converter overcomes the drawbacks presented by the conventional push pull converter, such as magnetic aberration, large switch loss, and voltage spike on switches, so it can get higher efficiency, and a wider application area. The operating principle of the new converter is analyzed and verified on a 600 W, 50 kHz experimental prototype. Several zero voltage and zero current switching PWM push pull three level converters are proposed.展开更多
A 2GHz differentially tuned CMOS monolithic LC-VCO is designed and fabricated in a 0.18μm CMOS process. The VCO has a 16.15% tuning range (from 1. 8998 to 2. 2335GHz) through a combination of analog and digital tun...A 2GHz differentially tuned CMOS monolithic LC-VCO is designed and fabricated in a 0.18μm CMOS process. The VCO has a 16.15% tuning range (from 1. 8998 to 2. 2335GHz) through a combination of analog and digital tuning techniques (4-bit binary switch-capacitor array). The measured phase noise is - 118.17dBc/Hz at a 1MHz offset from a 2. 158GHz carrier. With the presented improved switch,the phase noise varies no more than 3dB at different digital control bits. The phase noise changes only by about 2dB in the tuning range because of the pn-junctions as the varactors. The VCO draws a current of about 2. lmA from a 1.8V power supply and works normally with a 1.5V power supply.展开更多
A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock reco...A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock recovery method based on filter,and implements monolithic clock-recovery IC.The designed circuits include phase detector,voltage-controlled oscillator and loop filter.Among them,the voltage-control oscillator is a modified two-stage ring oscillator,which provides quadrature clock signals and presents wide voltage-controlled range and high voltage-controlling sensitivity.展开更多
The unbalanced voltages cause negative effects on the doubly fed induction generator (DFIG) sucn as torque pulsation,and increased stator current. Based on the symmetrical component theory, the torque pulsation is t...The unbalanced voltages cause negative effects on the doubly fed induction generator (DFIG) sucn as torque pulsation,and increased stator current. Based on the symmetrical component theory, the torque pulsation is the consequence of the interaction of stator and rotor currents of different sequences. This paper presents a control technique to reduce the effect of unbalanced voltages on the DFIG in wind energy conversion systems. The negative sequence stator voltage is derived from the unbalanced three phase stator voltages. The compensated rotor voltage in terms of the derived negative sequence stator voltage and slip which minimizes the negative stator and rotor currents is proposed. The results from the simulation of control system with steady state model and dynamic model of the DFIG show that additional control loop with compensated voltage can significantly reduce torque and reactive power pulsations.展开更多
A method of feedforward compensation for electromotive force(EMF) in the single-phase permanent magnet linear generation system and a research in the performance of the single-phase PMLG system are presented.A general...A method of feedforward compensation for electromotive force(EMF) in the single-phase permanent magnet linear generation system and a research in the performance of the single-phase PMLG system are presented.A general mathematical model for the single-phase permanet magnet linear generator(PMLG) system is established and the current loop,voltage loop and the feedforward control are studied based on it for the control system.Then this paper analyses the transfer function of the power system,optimizes current loop and voltage loop parameters by engineering algorithm,and calculates the optimal control parameters.An EMF feedforward compensation method is developed to optimize the control system which improves dynamic performance of the power system but does not affect the steady-state performance.The result of this research verifies the correctness and rationality of the design for the control system.展开更多
This paper focuses on a combination of three-phase VSI (voltage source inverter) with a predictive current control to provide an optimized system for three-phase inverters that control the load current. A FS-MPC (f...This paper focuses on a combination of three-phase VSI (voltage source inverter) with a predictive current control to provide an optimized system for three-phase inverters that control the load current. A FS-MPC (finite set-model predictive control) strategy for a three-phase VSI for RES (renewable energy systems) applications is implemented. The renewable energy systems model is used in this paper to investigate the system performance when power is supplied to resistive-inductive load. With three different cases, the evaluation of the system is done. Firstly, the robustness of control strategy under variable DC-Link is done in terms of the THD (total harmonic distortion). Secondly, with one prediction step, the system performance is tested using different sampling time, and lastly, the dynamic response of the system with step change in the amplitude of the reference is investigated. The simulations and result analyses are carried out using Matlab/Simulink to test the effectiveness and robustness of FS-MPC for two-level VSI with AC filter for resistive-inductive load supplied by a renewable energy system.展开更多
文摘A fast-locking, low-jitter, phase-locked loop (PLL) with a simple phase-frequency detector is proposed. The phase-frequency detector is composed of only two XOR gates. It simultaneously achieves low jitter and short locking time. The voltage-controlled oscillator within the PLL consists of four-stage ring oscillators which are coupled to each other and oscillate with the same frequency and a phase shift of 45. The PLL is fabricated in 0. 1Stem CMOS technology. The measured phase noise of the PLL output at 500kHz offset from the 5GHz center frequency is - 102.6dBc/Hz. The circuit exhibits a capture range of 280MHz and a low RMS jitter of 2.06ps. The power dissipation excluding the output buffers is only 21.6roW at a 1.8V supply.
文摘A new method for the control of the speed of an ultrasonic motor and its implementation are proposed. The method is merely used by detecting the time when motor′s monitor signal reaches a non zero reference value than a zero one, the direction, in which the driving frequency of the motor should be shifted, can be promptly calculated. With the aid of a CPU and the phase locked frequency doubling technique, the motor can be steadily driven in a wide range of frequency and the optimum frequency can be captured rapidly and precisely. Experiment shows that the above method is available.
文摘The application areas of conventional push pull converters are limited because of high voltage stress of switches (twice of input voltage). This paper presents a novel zero voltage and zero current switching (ZCS) PWM push pull three level converter in which the voltage stress of switches is input voltage. With phase shifted modulation strategy, the leading switches can only realize zero voltage switching (ZVS), and the lagging switches can realize ZCS when block capacitor and block diodes are added. Using the strategy, the converter overcomes the drawbacks presented by the conventional push pull converter, such as magnetic aberration, large switch loss, and voltage spike on switches, so it can get higher efficiency, and a wider application area. The operating principle of the new converter is analyzed and verified on a 600 W, 50 kHz experimental prototype. Several zero voltage and zero current switching PWM push pull three level converters are proposed.
文摘A 2GHz differentially tuned CMOS monolithic LC-VCO is designed and fabricated in a 0.18μm CMOS process. The VCO has a 16.15% tuning range (from 1. 8998 to 2. 2335GHz) through a combination of analog and digital tuning techniques (4-bit binary switch-capacitor array). The measured phase noise is - 118.17dBc/Hz at a 1MHz offset from a 2. 158GHz carrier. With the presented improved switch,the phase noise varies no more than 3dB at different digital control bits. The phase noise changes only by about 2dB in the tuning range because of the pn-junctions as the varactors. The VCO draws a current of about 2. lmA from a 1.8V power supply and works normally with a 1.5V power supply.
文摘A monolithic clock-recovery circuit used in 622 Mb/s optical communication system is designed,which is based on the phase-locked loop theory,and uses bipolar transistor model.It overcomes the shortcoming of clock recovery method based on filter,and implements monolithic clock-recovery IC.The designed circuits include phase detector,voltage-controlled oscillator and loop filter.Among them,the voltage-control oscillator is a modified two-stage ring oscillator,which provides quadrature clock signals and presents wide voltage-controlled range and high voltage-controlling sensitivity.
文摘The unbalanced voltages cause negative effects on the doubly fed induction generator (DFIG) sucn as torque pulsation,and increased stator current. Based on the symmetrical component theory, the torque pulsation is the consequence of the interaction of stator and rotor currents of different sequences. This paper presents a control technique to reduce the effect of unbalanced voltages on the DFIG in wind energy conversion systems. The negative sequence stator voltage is derived from the unbalanced three phase stator voltages. The compensated rotor voltage in terms of the derived negative sequence stator voltage and slip which minimizes the negative stator and rotor currents is proposed. The results from the simulation of control system with steady state model and dynamic model of the DFIG show that additional control loop with compensated voltage can significantly reduce torque and reactive power pulsations.
基金Supported by the National High Technology Research and Development Program of China(No.2006AA05Z231)the National Natural Science Foundation of China(No.51177025)
文摘A method of feedforward compensation for electromotive force(EMF) in the single-phase permanent magnet linear generation system and a research in the performance of the single-phase PMLG system are presented.A general mathematical model for the single-phase permanet magnet linear generator(PMLG) system is established and the current loop,voltage loop and the feedforward control are studied based on it for the control system.Then this paper analyses the transfer function of the power system,optimizes current loop and voltage loop parameters by engineering algorithm,and calculates the optimal control parameters.An EMF feedforward compensation method is developed to optimize the control system which improves dynamic performance of the power system but does not affect the steady-state performance.The result of this research verifies the correctness and rationality of the design for the control system.
文摘This paper focuses on a combination of three-phase VSI (voltage source inverter) with a predictive current control to provide an optimized system for three-phase inverters that control the load current. A FS-MPC (finite set-model predictive control) strategy for a three-phase VSI for RES (renewable energy systems) applications is implemented. The renewable energy systems model is used in this paper to investigate the system performance when power is supplied to resistive-inductive load. With three different cases, the evaluation of the system is done. Firstly, the robustness of control strategy under variable DC-Link is done in terms of the THD (total harmonic distortion). Secondly, with one prediction step, the system performance is tested using different sampling time, and lastly, the dynamic response of the system with step change in the amplitude of the reference is investigated. The simulations and result analyses are carried out using Matlab/Simulink to test the effectiveness and robustness of FS-MPC for two-level VSI with AC filter for resistive-inductive load supplied by a renewable energy system.