The paper takes a method of a low speed processer based on FPGA hardware accelerator SOC units to realize the MP3 player, and include some peripheral devices. The experimental results show that the system has implemen...The paper takes a method of a low speed processer based on FPGA hardware accelerator SOC units to realize the MP3 player, and include some peripheral devices. The experimental results show that the system has implemented the basic functions of the MP3 player, having its own advantages on increasing the decoding speed and reducing the system consumption. The system is convenient to redesign for more function in the future. In conclusion, it has a wide application prospect.展开更多
文摘The paper takes a method of a low speed processer based on FPGA hardware accelerator SOC units to realize the MP3 player, and include some peripheral devices. The experimental results show that the system has implemented the basic functions of the MP3 player, having its own advantages on increasing the decoding speed and reducing the system consumption. The system is convenient to redesign for more function in the future. In conclusion, it has a wide application prospect.
