Field-effect transistors （FETs） have been fabricated using as-grown single-walled carbon nanotubes （SWNTs） for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as t...Field-effect transistors （FETs） have been fabricated using as-grown single-walled carbon nanotubes （SWNTs） for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition （CVD）. The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I ON/I OFF ratio of 10^6 and a maximum ON-state current （/ON） exceeding 13 uA. The large I ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.展开更多
文摘Field-effect transistors （FETs） have been fabricated using as-grown single-walled carbon nanotubes （SWNTs） for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition （CVD）. The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I ON/I OFF ratio of 10^6 and a maximum ON-state current （/ON） exceeding 13 uA. The large I ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.
