A SOI material with thick BOX (2.2 μm) was successfully fabricated using the Smart-cut technology. The thick BOX SOI microstructures were investigated by high resolution cross-sectional transmission electron microsco...A SOI material with thick BOX (2.2 μm) was successfully fabricated using the Smart-cut technology. The thick BOX SOI microstructures were investigated by high resolution cross-sectional transmission electron microscopy (XTEM), while the electrical properties were studied by the spreading resistance profile (SRP). Experimental results demonstrate that both structural and electrical properties of the SOI structure are very good.展开更多
An inherent self-heating effect of the silicon-on-insulator (SOI) devices limits their application at high current levels. In this paper a novel solution to reduce the self-heating effect is proposed, based on N+ and ...An inherent self-heating effect of the silicon-on-insulator (SOI) devices limits their application at high current levels. In this paper a novel solution to reduce the self-heating effect is proposed, based on N+ and O+ co-implantation into silicon wafer to form a new buried layer structure. This new structure was simulated using Medici program, and the temperature distribution and output characteristics were compared with those of the conventional SOI counterparts. As expected, a reduction of self-heating effect in the novel SOI device was observed.展开更多
基金Supported by the National Natural Science Foundation of China(No.69906005)and the Shanghai Youth Foundation(No.01 QMH1403)
文摘A SOI material with thick BOX (2.2 μm) was successfully fabricated using the Smart-cut technology. The thick BOX SOI microstructures were investigated by high resolution cross-sectional transmission electron microscopy (XTEM), while the electrical properties were studied by the spreading resistance profile (SRP). Experimental results demonstrate that both structural and electrical properties of the SOI structure are very good.
基金Supported by the Special Funds for Major State Basic Research Projects(NO.G20000365)and the National Natural Science Foundation of China(No.90101012)
文摘An inherent self-heating effect of the silicon-on-insulator (SOI) devices limits their application at high current levels. In this paper a novel solution to reduce the self-heating effect is proposed, based on N+ and O+ co-implantation into silicon wafer to form a new buried layer structure. This new structure was simulated using Medici program, and the temperature distribution and output characteristics were compared with those of the conventional SOI counterparts. As expected, a reduction of self-heating effect in the novel SOI device was observed.