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综合跳频的研究
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作者 陆恒 《电信快报》 2002年第1期16-17,21,共3页
关键词 综合跳频 移动通信 GSM网
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一种基于AD9854的高速跳频源设计 被引量:2
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作者 张华磊 《无线电工程》 2008年第1期49-50,共2页
介绍了跳频通信系统的基本组成、工作方式以及跳频通信系统中跳频综合器的设计要求。结合跳频综合器的设计要求以及AD9854、FPGA的特点给出了一种基于AD9854的高速跳频源实现方法,在微处理器和FPGA的控制下能够生成多种跳速和多种图案... 介绍了跳频通信系统的基本组成、工作方式以及跳频通信系统中跳频综合器的设计要求。结合跳频综合器的设计要求以及AD9854、FPGA的特点给出了一种基于AD9854的高速跳频源实现方法,在微处理器和FPGA的控制下能够生成多种跳速和多种图案的跳频信号,适合于多种应用场合。 展开更多
关键词 通信 DDS 综合 FPGA
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Key technologies of frequency-hopping frequency synthesizer for Bluetooth RF front-end
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作者 徐勇 王志功 +3 位作者 李智群 章丽 闵锐 徐光辉 《Journal of Southeast University(English Edition)》 EI CAS 2005年第3期260-262,共3页
A scheme of a frequency-hopping frequency-synthesizer applied to a Bluetooth ratio frequency (RF) front-end is presented,and design of a voltage controlled oscillator (VCO) and dual-modulus prescaler are focused o... A scheme of a frequency-hopping frequency-synthesizer applied to a Bluetooth ratio frequency (RF) front-end is presented,and design of a voltage controlled oscillator (VCO) and dual-modulus prescaler are focused on.It is fabricated in a 0.18 μm mixed-signal CMOS (complementary metal-oxide-semiconductor transistor) process.The power dissipation of VCO is low and a stable performance is gained.The measured phase noise of VCO at 2.4 GHz is less than -114.32 dBc/Hz.The structure of the DMP is optimized and a novel D-latch integrated with "OR" logic gate is used.The measured results show that the chip can work well under a 1.8 V power supply.The power dissipation of the core part in a dual modulus prescaler is only 5.76 mW.An RMS jitter of 2 ps is measured on the output signal at 118.3 MHz.It is less than 0.02% of the clock period. 展开更多
关键词 BLUETOOTH frequency hopping frequency synthesizer voltage controlled oscillator (VCO) dualmodulus prescaler programmable divider
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