提出了一种新型的 Si COIMESFET器件结构 ,即介质槽隔离 Si COIMESFET。模拟结果表明 ,新型结构器件与常规平面 Si COI MESFET器件相比 ,击穿电压得到很大提高 ,从 3 80 V提高到近 1 1 0 0 V,而饱和漏电流和跨导下降。但通过器件结构的...提出了一种新型的 Si COIMESFET器件结构 ,即介质槽隔离 Si COIMESFET。模拟结果表明 ,新型结构器件与常规平面 Si COI MESFET器件相比 ,击穿电压得到很大提高 ,从 3 80 V提高到近 1 1 0 0 V,而饱和漏电流和跨导下降。但通过器件结构的优化设计可以保障在击穿电压提高的同时漏电流和跨导不会发生大的退化。该器件结构为高温、抗辐照和大功率集成电路研制打下基础。展开更多
A Schottky gate resonant tunneling transistor （SGRTT） is fabricated. Relying on simulation by ATLAS software,we find that the gate voltages can be used to control the current of SGRTT when the emitter terminal is gr...A Schottky gate resonant tunneling transistor （SGRTT） is fabricated. Relying on simulation by ATLAS software,we find that the gate voltages can be used to control the current of SGRTT when the emitter terminal is grounded and a positive bias voltage is applied to the collector terminal. When the collector terminal is grounded, the gate voltages can control the peak voltage. As revealed by measurement results, the reason is that the gate voltages and the electric field distribution on emitter and collector terminal change the distribution of the depletion region.展开更多
A quasi two-dimensional （2D） analytical model of a double-gate （DG） MOSFET with Schottky source/drain is developed based on the Poisson equation.The 2D potential distribution in the channel is calculated.An expres...A quasi two-dimensional （2D） analytical model of a double-gate （DG） MOSFET with Schottky source/drain is developed based on the Poisson equation.The 2D potential distribution in the channel is calculated.An expression for threshold voltage for a short-channel DG MOSFET with Schottky S/D is also presented by defining the turn-on condition.The results of the model are verified by the numerical simulator DESSIS-ISE.展开更多
文摘提出了一种新型的 Si COIMESFET器件结构 ,即介质槽隔离 Si COIMESFET。模拟结果表明 ,新型结构器件与常规平面 Si COI MESFET器件相比 ,击穿电压得到很大提高 ,从 3 80 V提高到近 1 1 0 0 V,而饱和漏电流和跨导下降。但通过器件结构的优化设计可以保障在击穿电压提高的同时漏电流和跨导不会发生大的退化。该器件结构为高温、抗辐照和大功率集成电路研制打下基础。
文摘A Schottky gate resonant tunneling transistor （SGRTT） is fabricated. Relying on simulation by ATLAS software,we find that the gate voltages can be used to control the current of SGRTT when the emitter terminal is grounded and a positive bias voltage is applied to the collector terminal. When the collector terminal is grounded, the gate voltages can control the peak voltage. As revealed by measurement results, the reason is that the gate voltages and the electric field distribution on emitter and collector terminal change the distribution of the depletion region.
文摘A quasi two-dimensional （2D） analytical model of a double-gate （DG） MOSFET with Schottky source/drain is developed based on the Poisson equation.The 2D potential distribution in the channel is calculated.An expression for threshold voltage for a short-channel DG MOSFET with Schottky S/D is also presented by defining the turn-on condition.The results of the model are verified by the numerical simulator DESSIS-ISE.
