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Low Power Design of High Speed CMOS Pulse Stream Neuron Circuit
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作者 陈继伟 石秉学 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2000年第11期1064-1068,共5页
A new pulse stream neuron circuit is presented, which can be obtained in the digital CMOS process and combines both the merits of digital circuits and analog ones. The output is expressed by the frequency of the pulse... A new pulse stream neuron circuit is presented, which can be obtained in the digital CMOS process and combines both the merits of digital circuits and analog ones. The output is expressed by the frequency of the pulses with transfer characteristic, which is correspondent with the ideal sigmoid curve perfectly. Moreover, the pulse\|active strategy is introduced into the design of this CMOS pulse stream neuron circuit for the first time in order to reduce the power dissipation, which is applicable to the low\|power design of mixed\|signal circuits,too. A simple technical process and compact architecture make this circuit work at a higher speed and with lower power dissipation and smaller area. 展开更多
关键词 人工神经网络 脉冲 CMOS 电路 脉冲激励策略
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