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自适应带宽锁相环建模分析与验证 被引量:2
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作者 沈广振 杨煜 赵玉月 《电子与封装》 2020年第3期27-32,共6页
基于UMC 40 nm CMOS工艺,进行了自适应带宽锁相环的设计。根据自适应带宽锁相环原理和结构特点,对自适应带宽锁相环常用架构进行分析,并详细阐述自适应带宽锁相环系统模型。针对锁相环各模块引入噪声对输出信号噪声的贡献进行分析,并根... 基于UMC 40 nm CMOS工艺,进行了自适应带宽锁相环的设计。根据自适应带宽锁相环原理和结构特点,对自适应带宽锁相环常用架构进行分析,并详细阐述自适应带宽锁相环系统模型。针对锁相环各模块引入噪声对输出信号噪声的贡献进行分析,并根据分析结果对其系统和噪声进行Matlab建模分析,最后通过测试验证了Matlab建模分析的结果。 展开更多
关键词 自适应带宽锁相环 系统分析 噪声 Matlab建模
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An Adaptive-Bandwidth CMOS PLL with Low Jitter and a Wide Tuning Range 被引量:6
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作者 宋颖 王源 +3 位作者 贾松 李宏义 赵宝瑛 吉利久 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第5期908-912,共5页
This paper presents a novel adaptive-bandwidth charge pump PLL with low jitter and a wide tuning range. With an adaptive bandwidth,the proposed PLL can scale its loop dynamics proportional to the output frequency and ... This paper presents a novel adaptive-bandwidth charge pump PLL with low jitter and a wide tuning range. With an adaptive bandwidth,the proposed PLL can scale its loop dynamics proportional to the output frequency and maintain optimal performance over its entire output range. In order to improve the jitter performance of the PLL,a matching tech- nique is employed in the charge pump,and a voltage-to-voltage converter is used to achieve a low gain VCO. The experimental chip was fabricated in a 0. 35μm CMOS process. The measured results show that the PLL has perfect jitter performance within its operating range from 200MHz to 1.1GHz. 展开更多
关键词 PLL adaptive bandwidth low jitter wide tuning range
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