In the EU (European Union), Cyprus's problems aren't new. Ten years later, the same debate is being held all over again, just from a different point of view. It is emblematic of this current financial crisis becau...In the EU (European Union), Cyprus's problems aren't new. Ten years later, the same debate is being held all over again, just from a different point of view. It is emblematic of this current financial crisis because the banking system is much bigger than GDP (Gross Domestic Product). Setting aside the sluggish economic performance, as well as the usual gap between northern and southern regions, people are uncomfortable with the EU. Getting the EU to finance a deficit is very tempting because it seems to be a politically and socially painless option, but can we count on the EU to devise such a smoothly running system? Cyprus is interesting on many levels, from the debate concerning the limits of cohesion policy to the need of finding new solutions for the European periphery. It raises the question of whether a real fiscal and political union is possible, in light of the actual geoeconomic and geopolitical dynamics among the EU, Turkey, and Russia. The aim of this paper is to explore the possible mechanisms for an integration of Cyprus in order to go beyond fiscal burden sharing. It is an important starting point to paving the way to new policies and strategies for changing the objectives of economic convergence.展开更多
This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator (SO1) technology node. It consists of two access transistors and two pull-down tran...This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator (SO1) technology node. It consists of two access transistors and two pull-down transistors. The pull-down transistors have larger channel length than the access transistors. Due to the significant short channel effect of small-size MOS transistors, the access transistors have much larger leakage current than the pull-down transistors,enabling the SRAM cell to maintain logic "1" while in standby. The storage node voltages of the cell are fed back to the back-gates of the access transistors,enabling the stable "read" operation of the cell. The use of back-gate feedback also helps to im- prove the static noise margin (SNM) of the cell. The proposed SRAM cell has smaller area than conventional bulk 6T SRAM cells and 4T SRAM cells. The speed and power dissipation of the SRAM cell are simulated and discussed. The SRAM cell can operate with a 0. 5V supply voltage.展开更多
文摘In the EU (European Union), Cyprus's problems aren't new. Ten years later, the same debate is being held all over again, just from a different point of view. It is emblematic of this current financial crisis because the banking system is much bigger than GDP (Gross Domestic Product). Setting aside the sluggish economic performance, as well as the usual gap between northern and southern regions, people are uncomfortable with the EU. Getting the EU to finance a deficit is very tempting because it seems to be a politically and socially painless option, but can we count on the EU to devise such a smoothly running system? Cyprus is interesting on many levels, from the debate concerning the limits of cohesion policy to the need of finding new solutions for the European periphery. It raises the question of whether a real fiscal and political union is possible, in light of the actual geoeconomic and geopolitical dynamics among the EU, Turkey, and Russia. The aim of this paper is to explore the possible mechanisms for an integration of Cyprus in order to go beyond fiscal burden sharing. It is an important starting point to paving the way to new policies and strategies for changing the objectives of economic convergence.
文摘This paper proposes a novel loadless 4T SRAM cell composed of nMOS transistors. The SRAM cell is based on 32nm silicon-on-insulator (SO1) technology node. It consists of two access transistors and two pull-down transistors. The pull-down transistors have larger channel length than the access transistors. Due to the significant short channel effect of small-size MOS transistors, the access transistors have much larger leakage current than the pull-down transistors,enabling the SRAM cell to maintain logic "1" while in standby. The storage node voltages of the cell are fed back to the back-gates of the access transistors,enabling the stable "read" operation of the cell. The use of back-gate feedback also helps to im- prove the static noise margin (SNM) of the cell. The proposed SRAM cell has smaller area than conventional bulk 6T SRAM cells and 4T SRAM cells. The speed and power dissipation of the SRAM cell are simulated and discussed. The SRAM cell can operate with a 0. 5V supply voltage.