变电站设备种类繁多、缺陷类型复杂、特征差异大,传统的基于深度学习的缺陷图像检测模型难以同时有效处理不同设备的多种缺陷。为此,提出了一种基于语义信息距离解耦的缺陷图像检测模型(sematic-distance based decoupling detection mo...变电站设备种类繁多、缺陷类型复杂、特征差异大,传统的基于深度学习的缺陷图像检测模型难以同时有效处理不同设备的多种缺陷。为此,提出了一种基于语义信息距离解耦的缺陷图像检测模型(sematic-distance based decoupling detection model,SDB-DDM)。首先对缺陷类别进行语义信息聚簇,构建解耦式网络结构,然后对网络输出进行加权锚框融合,并在损失函数中加入局部预测损失以提升预测能力,同时提出解耦式非极大值抑制策略以加快模型推理速度。该模型可根据缺陷类别进行自适应调整,以适用变电运维多类别缺陷图像检测的应用场景。实验结果显示,该模型的平均精度均值达到了69.68%。同平台下相较于目前性能最佳的目标检测模型(YOLOX),精度提升了1.36个百分点,参数量下降了5%,推理速度提升了34%。展开更多
Based on the 65nm CMOS process,a novel parallel RLC coupling interconnect analytical model is presented synthetically considering parasitical capacitive and parasitical inductive effects. Applying function approximati...Based on the 65nm CMOS process,a novel parallel RLC coupling interconnect analytical model is presented synthetically considering parasitical capacitive and parasitical inductive effects. Applying function approximation and model order-reduction to the model, we derive a closed-form and time-domain waveform for the far-end crosstalk of a victim line under ramp input transition. For various interconnect coupling sizes, the proposed RLC coupling analytical model enables the estimation of the crosstalk voltage within 2.50% error compared with Hspice simulation in a 65nm CMOS process. This model can be used in computer-aided-design of nanometer SOCs.展开更多
文摘变电站设备种类繁多、缺陷类型复杂、特征差异大,传统的基于深度学习的缺陷图像检测模型难以同时有效处理不同设备的多种缺陷。为此,提出了一种基于语义信息距离解耦的缺陷图像检测模型(sematic-distance based decoupling detection model,SDB-DDM)。首先对缺陷类别进行语义信息聚簇,构建解耦式网络结构,然后对网络输出进行加权锚框融合,并在损失函数中加入局部预测损失以提升预测能力,同时提出解耦式非极大值抑制策略以加快模型推理速度。该模型可根据缺陷类别进行自适应调整,以适用变电运维多类别缺陷图像检测的应用场景。实验结果显示,该模型的平均精度均值达到了69.68%。同平台下相较于目前性能最佳的目标检测模型(YOLOX),精度提升了1.36个百分点,参数量下降了5%,推理速度提升了34%。
文摘Based on the 65nm CMOS process,a novel parallel RLC coupling interconnect analytical model is presented synthetically considering parasitical capacitive and parasitical inductive effects. Applying function approximation and model order-reduction to the model, we derive a closed-form and time-domain waveform for the far-end crosstalk of a victim line under ramp input transition. For various interconnect coupling sizes, the proposed RLC coupling analytical model enables the estimation of the crosstalk voltage within 2.50% error compared with Hspice simulation in a 65nm CMOS process. This model can be used in computer-aided-design of nanometer SOCs.
