Previously,a single data-path stack was adequate for data-path chips,and the complexity and size of the data-path was comparatively small.As current data-path chips,such as system-on-a-chip (SOC),become more complex,m...Previously,a single data-path stack was adequate for data-path chips,and the complexity and size of the data-path was comparatively small.As current data-path chips,such as system-on-a-chip (SOC),become more complex,multiple data-path stacks are required to implement the entire data-path.As more data-path stacks are integrated into SOC,data-path is becoming a critical part of the whole giga-scale integrated circuits (GSI) design.The traditional physical design methodology can not satisfy the data-path performance requirements,because it can not accommodate the data-path bit-sliced structure and the strict performance (such as timing,coupling,and crosstalk) constraints.Challenges in the data-path physical design are addressed.The fundamental problems and key technologies in data-path physical design are analysed.The corresponding researches and solutions in this research field are also discussed.展开更多
A low-power-consumption 9bit 10MS/s pipeline ADC,used in a CMOS image sensor,is proposed. In the design, the decrease of power consumption is achieved by applying low-power-consumption and large-output-swing amplifier...A low-power-consumption 9bit 10MS/s pipeline ADC,used in a CMOS image sensor,is proposed. In the design, the decrease of power consumption is achieved by applying low-power-consumption and large-output-swing amplifiers with gain boost structure, and biasing all the cells with the same voltage bias source, which requires careful layout design and large capacitors. In addition,capacitor array DAC is also applied to reduce power consumption,and low threshold voltage MOS transistors are used to achieve a large signal processing range. The ADC was implemented in a 0.18μm 4M-1 P CMOS process,and the experimental results indicate that it consumes only 7mW, which is much less than general pipeline ADCs. The ADC was used in a 300000 pixels CMOS image sensor.展开更多
Durability zonation standard （DZS） is proposed to provide useful parameters for durable concrete structure design. It deals not only with the influence of environment on structures, but also with types, functions an...Durability zonation standard （DZS） is proposed to provide useful parameters for durable concrete structure design. It deals not only with the influence of environment on structures, but also with types, functions and importance of structures based on the theory of life cycle cost（LCC）. First, the basic concept of DZS for concrete structure design is defined. Then the basic principles for DZS are established. The factors for zonation according to natural environmental conditions and structural importance are identified. The usefulness of DZS by citing a real application for concrete highway bridges in Zhejiang Province is demonstrated. Finally, durability regulations are provided accordingly to zonation.展开更多
The performances of analog circuits depend greatly on the layout parasitics and mismatches.Novel techniques are proposed for modeling the distributed parasitic capacitance,parasitic parameter mismatch due to process g...The performances of analog circuits depend greatly on the layout parasitics and mismatches.Novel techniques are proposed for modeling the distributed parasitic capacitance,parasitic parameter mismatch due to process gradient and the inner stack routing mismatch.Based on the proposed models,an optimal stack generation technique is developed to control the parasitics and mismatches,optimize the stack shape and ensure the generation of an Eulerian graph for a given CMOS analog module.An OPA circuit example is given to demonstrate that the circuit performances such as unit gain bandwidth and phase margin are enhanced by the proposed layout optimization method.展开更多
The English News of CRI possesses many advantages such as abundance of information and being easily accessible for English learners within the mainland of China. Unfortunately, it has been ignored by most teachers of ...The English News of CRI possesses many advantages such as abundance of information and being easily accessible for English learners within the mainland of China. Unfortunately, it has been ignored by most teachers of English and students. Based on the input hypothesis, affective filter hypothesis and schemata theory, this paper probes the mode of CRI English assisting English teaching in college.展开更多
The parametric part assembly generation method is presented. Based on the parametric part generated by means of constructive-element, through interactively inputting the relationships of the location and the assembly,...The parametric part assembly generation method is presented. Based on the parametric part generated by means of constructive-element, through interactively inputting the relationships of the location and the assembly, and by compiling operations like movement and rotation, the assembly drawing is created so as to implement the occurrence of the parameterizations of the assembly and the part drawing. The data structure of the assembly part and the key technologies of hidden line removal in the implementation of assembly process, etc. , are described in detail.展开更多
A statistical method for mapping quantitative trait loci （QTLs） underlying endosperm traits is proposed. The method is based on a genetic model containing both the direct effects and maternal effects of an endosperm...A statistical method for mapping quantitative trait loci （QTLs） underlying endosperm traits is proposed. The method is based on a genetic model containing both the direct effects and maternal effects of an endosperm QTL and on an experimental design termed two-stage hierarchical design, in which the trait information is obtained from F3 endosperms and molecular marker information is obtained from F2 plants and F3 embryos （plants）. Results of computer simulations indicate that the method can efficiently map endosperm QTLs and precisely estimate both the direct and maternal effects of endosperm QTLs when the sample size is sufficiently large.展开更多
A global routing algorithm with performance optimization under multi constraints is proposed,which studies RLC coupling noise,timing performance,and routability simultaneously at global routing level.The algorithm is...A global routing algorithm with performance optimization under multi constraints is proposed,which studies RLC coupling noise,timing performance,and routability simultaneously at global routing level.The algorithm is implemented and the global router is called CEE Gr.The CEE Gr is tested on MCNC benchmarks and the experimental results are promising.展开更多
The application of digital image processing to the classification of the slub-yarn texture is discussed. Texture of the slub-yarn fabric is analyzed by using the texture analysis techniques. The influence of the slub-...The application of digital image processing to the classification of the slub-yarn texture is discussed. Texture of the slub-yarn fabric is analyzed by using the texture analysis techniques. The influence of the slub-yarn parameters on the fabric texture is discussed. Results indicate that texture of the slub-yarn fabric can be reliably measured using gray level co-occurrence matrix (GLCM) analysis. The four indices of GLCM, the angular second moment, the contrast, the inverse difference moment and the correlation, are sensitive to the change of the slub-yarn parameters, and can be regarded as the major indices for the texture.展开更多
This paper focuses on a pattern design method for a 3D triangular garment surface. Firstly, some definitions of 3D style lines are proposed for designing the boundaries of patterns as drawing straight lines or splines...This paper focuses on a pattern design method for a 3D triangular garment surface. Firstly, some definitions of 3D style lines are proposed for designing the boundaries of patterns as drawing straight lines or splines on the triangular surface. Additionally some commonly used style lines are automatically generated to enhance design efficiency. Secondly, after style lines are preprocessed, a searching method is presented for quickly obtaining the boundaries and patches of a pattern on the 3D trian- gular surface. Finally a new pattern design reuse method is introduced by encoding/decoding the style line information. After style lines are encoded, the pattern design information can be saved in a pattern template and when decoding this template on a new garment surface, it automates the pattern generation for made-to-measure apparel products.展开更多
True color image city map is a sort of new-style map which combines the high resolution image and map symbols and shows both advantages in visualization. At the same time, the map unification and harmonization should ...True color image city map is a sort of new-style map which combines the high resolution image and map symbols and shows both advantages in visualization. At the same time, the map unification and harmonization should be taken into account dur-ing the design process, since some visual conflicts appear when map symbols overlaid on the true color image. The objective of this research is to explore the rules in the process of true color image city map design based on chromatic and aesthetic knowledge. At the end, taking the Image Atlas of Guangzhou as an example, image color adjustment, road network presentation, and symbol de-signing issues will be discussed in the application.展开更多
A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gatin...A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gating circuit in high speed circuit, a distributed and early clock gating method was developed on its instruction fetch & decoder unit, its pipelined data-path unit and its super-Harvard memory interface unit. The core was implemented following the Synopsys back-end flow under TSMC (Taiwan Silicon manufacture corporation) 0.18-μm 1.8-V 1P6M process, with a core size of 2 mm×2 mm. Result shows that it can run under 200 MHz with a power performance around 0.3 mW/MIPS. Meanwhile, only 39.7% circuit is active simultaneously in average, compared to its non-gating counterparts.展开更多
Due to different cultural and historical background, the technology in Western and Eastern pattern design is inherently different. Along with the development of technology, garment pattern design technique is making p...Due to different cultural and historical background, the technology in Western and Eastern pattern design is inherently different. Along with the development of technology, garment pattern design technique is making progress towards high effectiveness and accuracy. Many researchers proposed different alternative methodologies to improve the current pattern making processes. This article examines the development of Western and Eastern garment pattern design technique. The main objective of this article is to provide a thorough review and hence a better understanding to those researchers who made contribution on developing pattern design technique and continue their work in the future.展开更多
文摘Previously,a single data-path stack was adequate for data-path chips,and the complexity and size of the data-path was comparatively small.As current data-path chips,such as system-on-a-chip (SOC),become more complex,multiple data-path stacks are required to implement the entire data-path.As more data-path stacks are integrated into SOC,data-path is becoming a critical part of the whole giga-scale integrated circuits (GSI) design.The traditional physical design methodology can not satisfy the data-path performance requirements,because it can not accommodate the data-path bit-sliced structure and the strict performance (such as timing,coupling,and crosstalk) constraints.Challenges in the data-path physical design are addressed.The fundamental problems and key technologies in data-path physical design are analysed.The corresponding researches and solutions in this research field are also discussed.
文摘A low-power-consumption 9bit 10MS/s pipeline ADC,used in a CMOS image sensor,is proposed. In the design, the decrease of power consumption is achieved by applying low-power-consumption and large-output-swing amplifiers with gain boost structure, and biasing all the cells with the same voltage bias source, which requires careful layout design and large capacitors. In addition,capacitor array DAC is also applied to reduce power consumption,and low threshold voltage MOS transistors are used to achieve a large signal processing range. The ADC was implemented in a 0.18μm 4M-1 P CMOS process,and the experimental results indicate that it consumes only 7mW, which is much less than general pipeline ADCs. The ADC was used in a 300000 pixels CMOS image sensor.
基金The Key Project of National Natural Science Foun-dation of China (No50538070)
文摘Durability zonation standard （DZS） is proposed to provide useful parameters for durable concrete structure design. It deals not only with the influence of environment on structures, but also with types, functions and importance of structures based on the theory of life cycle cost（LCC）. First, the basic concept of DZS for concrete structure design is defined. Then the basic principles for DZS are established. The factors for zonation according to natural environmental conditions and structural importance are identified. The usefulness of DZS by citing a real application for concrete highway bridges in Zhejiang Province is demonstrated. Finally, durability regulations are provided accordingly to zonation.
文摘The performances of analog circuits depend greatly on the layout parasitics and mismatches.Novel techniques are proposed for modeling the distributed parasitic capacitance,parasitic parameter mismatch due to process gradient and the inner stack routing mismatch.Based on the proposed models,an optimal stack generation technique is developed to control the parasitics and mismatches,optimize the stack shape and ensure the generation of an Eulerian graph for a given CMOS analog module.An OPA circuit example is given to demonstrate that the circuit performances such as unit gain bandwidth and phase margin are enhanced by the proposed layout optimization method.
文摘The English News of CRI possesses many advantages such as abundance of information and being easily accessible for English learners within the mainland of China. Unfortunately, it has been ignored by most teachers of English and students. Based on the input hypothesis, affective filter hypothesis and schemata theory, this paper probes the mode of CRI English assisting English teaching in college.
文摘The parametric part assembly generation method is presented. Based on the parametric part generated by means of constructive-element, through interactively inputting the relationships of the location and the assembly, and by compiling operations like movement and rotation, the assembly drawing is created so as to implement the occurrence of the parameterizations of the assembly and the part drawing. The data structure of the assembly part and the key technologies of hidden line removal in the implementation of assembly process, etc. , are described in detail.
基金This work was supported by the Key Sci-Tech Project of Fujian Province (No. 2004NZ01-2) the Natural Science Foundation of Fujian Province of China (No. 2006J0300).
文摘A statistical method for mapping quantitative trait loci （QTLs） underlying endosperm traits is proposed. The method is based on a genetic model containing both the direct effects and maternal effects of an endosperm QTL and on an experimental design termed two-stage hierarchical design, in which the trait information is obtained from F3 endosperms and molecular marker information is obtained from F2 plants and F3 embryos （plants）. Results of computer simulations indicate that the method can efficiently map endosperm QTLs and precisely estimate both the direct and maternal effects of endosperm QTLs when the sample size is sufficiently large.
文摘A global routing algorithm with performance optimization under multi constraints is proposed,which studies RLC coupling noise,timing performance,and routability simultaneously at global routing level.The algorithm is implemented and the global router is called CEE Gr.The CEE Gr is tested on MCNC benchmarks and the experimental results are promising.
文摘The application of digital image processing to the classification of the slub-yarn texture is discussed. Texture of the slub-yarn fabric is analyzed by using the texture analysis techniques. The influence of the slub-yarn parameters on the fabric texture is discussed. Results indicate that texture of the slub-yarn fabric can be reliably measured using gray level co-occurrence matrix (GLCM) analysis. The four indices of GLCM, the angular second moment, the contrast, the inverse difference moment and the correlation, are sensitive to the change of the slub-yarn parameters, and can be regarded as the major indices for the texture.
基金Project supported by the National Natural Science Foundation of China (No. 60473129)the Ph.D Programs Foundation of the Ministry of Education of China (No. 20060335118)
文摘This paper focuses on a pattern design method for a 3D triangular garment surface. Firstly, some definitions of 3D style lines are proposed for designing the boundaries of patterns as drawing straight lines or splines on the triangular surface. Additionally some commonly used style lines are automatically generated to enhance design efficiency. Secondly, after style lines are preprocessed, a searching method is presented for quickly obtaining the boundaries and patches of a pattern on the 3D trian- gular surface. Finally a new pattern design reuse method is introduced by encoding/decoding the style line information. After style lines are encoded, the pattern design information can be saved in a pattern template and when decoding this template on a new garment surface, it automates the pattern generation for made-to-measure apparel products.
文摘True color image city map is a sort of new-style map which combines the high resolution image and map symbols and shows both advantages in visualization. At the same time, the map unification and harmonization should be taken into account dur-ing the design process, since some visual conflicts appear when map symbols overlaid on the true color image. The objective of this research is to explore the rules in the process of true color image city map design based on chromatic and aesthetic knowledge. At the end, taking the Image Atlas of Guangzhou as an example, image color adjustment, road network presentation, and symbol de-signing issues will be discussed in the application.
基金The Research Project of China Military Department (No6130325)
文摘A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gating circuit in high speed circuit, a distributed and early clock gating method was developed on its instruction fetch & decoder unit, its pipelined data-path unit and its super-Harvard memory interface unit. The core was implemented following the Synopsys back-end flow under TSMC (Taiwan Silicon manufacture corporation) 0.18-μm 1.8-V 1P6M process, with a core size of 2 mm×2 mm. Result shows that it can run under 200 MHz with a power performance around 0.3 mW/MIPS. Meanwhile, only 39.7% circuit is active simultaneously in average, compared to its non-gating counterparts.
基金This Research is Supported by the Tuition Scholarship from The Hong Kong Polytechnic University
文摘Due to different cultural and historical background, the technology in Western and Eastern pattern design is inherently different. Along with the development of technology, garment pattern design technique is making progress towards high effectiveness and accuracy. Many researchers proposed different alternative methodologies to improve the current pattern making processes. This article examines the development of Western and Eastern garment pattern design technique. The main objective of this article is to provide a thorough review and hence a better understanding to those researchers who made contribution on developing pattern design technique and continue their work in the future.
