[Objective] The aim was to set up a plant digital information retrieval system.[Method] Plant digital information retrieval system was designed by combining with Microsoft Visual Basic 6.0 Enterprise Edition database ...[Objective] The aim was to set up a plant digital information retrieval system.[Method] Plant digital information retrieval system was designed by combining with Microsoft Visual Basic 6.0 Enterprise Edition database management system and Structure Query Language.[Result] The system realized electronic management and retrieval of local plant information.The key words of retrieval included family,genus,formal name,Chinese name,Latin,morphological characteristics,habitat,collection people,collection places,and protect class and so on.[Conclusion] It provided reference for these problems of species identification and digital management of herbarium.展开更多
The application of virtual reality technology has become more and more influential in garden design. Quest3D as a significant software to realize the virtual reality technology is utilized in this study to make a gard...The application of virtual reality technology has become more and more influential in garden design. Quest3D as a significant software to realize the virtual reality technology is utilized in this study to make a garden roaming demonstration system with the gardening design of a classical courtyard as an example. Besides, the advantages and disadvantages of applying Quest3D technology in garden landscape design are elaborated from the perspective of the selection of Quest3D technology, basic procedures for the selection and establishment of software and hardware.展开更多
According to the necessity of flexible workflow management system, the solution to set up the visualized workflow modelling system based on B/S structure is put forward, which conforms to the relevant specifications o...According to the necessity of flexible workflow management system, the solution to set up the visualized workflow modelling system based on B/S structure is put forward, which conforms to the relevant specifications of WfMC and the workflow process definition meta-model. The design for system structure is presented in detail, and the key technologies for system implementation are also introduced. Additionally, an example is illustrated to demonstrate the validity of system.展开更多
The implementation method of the IEEE 802.11 Medium Access Control (MAC) protocol is mainly based on DSP (Digital Signal Processor)/ ARM (Advanced Reduced instruction set computer Machine) processor or DSP/ARM IP (Int...The implementation method of the IEEE 802.11 Medium Access Control (MAC) protocol is mainly based on DSP (Digital Signal Processor)/ ARM (Advanced Reduced instruction set computer Machine) processor or DSP/ARM IP (Intellectual Property) core. This paper presents a method based on Nios II soft-core processor embedded in Altera’s Cyclone FPGA (Field Programmable Gate Array) and MicroC/OS-II RTOS (Real-Time Operation System). The benefits and drawbacks of above methods are compared, and then the method presented in this paper is described. The hardware and software partitioning are discussed; the hardware architecture is also illustrated and the MAC software programming is described in detail. The presented method has some advantages, such as low cost, easy-implementation and very suitable for the implementation of IEEE 802.11 MAC in research stage.展开更多
Focusing on the linearity shortcoming on a bipolar low noise amplifier(LNA),a new 6 ~14GHz four stage SiGe HBT LNA is proposed.This amplifier adopts a method of gain allocation on multiple stages to avoid the limitati...Focusing on the linearity shortcoming on a bipolar low noise amplifier(LNA),a new 6 ~14GHz four stage SiGe HBT LNA is proposed.This amplifier adopts a method of gain allocation on multiple stages to avoid the limitation on linearity especially with the addition of negative gain on the third stage.To realize gain flatness,extra zero is introduced to compensate the gain roll-off formed by pole,and local shunt-shunt negative feedback is used to widen the bandwidth as well as optimize circuit' s noise.Simulated results have shown that in 6 ~14GHz,this circuit achieves noise figure(NF) less than 3dB,gain of 17.8dB(+0.2dB),input and output reflection parameters of less than- 10 dB,and the K factor is above 1.15.展开更多
A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) ...A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) is used in the chip,which comprises a 256×256 pixel array together with column amplifiers,scan array circuits,series interface,control logic and Analog-Digital Converter (ADC). With the use of smart layout design,fill factor of pixel cell is 43%. Moreover,a new method of Dynamic Digital Double Sample (DDDS) which removes Fixed Pattern Noise (FPN) is used. The CMOS image sensor chip is implemented based on the 0.35μm process of chartered by Multi-Project Wafer (MPW). This chip performs well as expected.展开更多
New methodologies for l-Bit XOR-XNOR full- adder circuits are proposed to improve the speed and power as these circuits are basic building blocks for ALU circuit implementation. This paper presents comparative study o...New methodologies for l-Bit XOR-XNOR full- adder circuits are proposed to improve the speed and power as these circuits are basic building blocks for ALU circuit implementation. This paper presents comparative study of high-speed, low-power and low voltage full adder circuits. Simulation results illustrate the superiority of the proposed adder circuit against the conventional complementary metal-oxide-semiconductor （CMOS）, complementary pass-transistor logic （CPL）, TG, and Hybrid adder circuits in terms of delay, power and power delay product （PDP）. Simulation results reveal that the proposed circuit exhibits lower PDP and is more power efficient and faster when compared with the best available 1-bit full adder circuits. The design is implemented on UMC 0.18 μm process models in Cadence Virtuoso Schematic Composer at 1.8 V single ended supply voltage and simulations are carried out on Spectre S.展开更多
According to Marx, man is the sum of all social relationships. Social relationships are interpersonal communication, and realizing good interpersonal communication is all that social people desire. Analyzing the signi...According to Marx, man is the sum of all social relationships. Social relationships are interpersonal communication, and realizing good interpersonal communication is all that social people desire. Analyzing the significance and effect of image design （impression management） in interpersonal communication is the best way to strengthen our emphasis on image design and to make good use of image design and to achieve personal dream with real social integration.展开更多
This paper used the virtual reality modeling language （VRML） to establish the 3D virtual experiment instrument model, and by using the visual programming language VB to design and develop a interactive virtual reali...This paper used the virtual reality modeling language （VRML） to establish the 3D virtual experiment instrument model, and by using the visual programming language VB to design and develop a interactive virtual realization experiment platform, the interface has friendly interface, stable operation, strong practicability like with the Windows style, is a kind of reform for the traditional physics experiment teaching mode. The system has practical use value, also has reference value for the reform and modernization of other experimental courses.展开更多
With the advent of the information age, people＇ s lives have been changed unknowingly owing to lots of modem technology means. For the environmental artistic design, the traditional mode of environmental artistic des...With the advent of the information age, people＇ s lives have been changed unknowingly owing to lots of modem technology means. For the environmental artistic design, the traditional mode of environmental artistic design is broken through after the emergence of computer technology and virtual reality technique, which makes the scheme and application of virtual reality technique in environmental artistic design to own more practical value. In this paper, the virtual reality technique and its practical application in environmental artistic design are set forth, and the profound influence on the actual design by the virtual reality technique is studied with expectation of enlightenment for broadening the thought of environmental artistic design.展开更多
A modified extended binary Euclid＇ s algorithm which is more regularly iterative for computing an inversion in GF（2^m） is presented. Based on above modified algorithm, a serial-in serial-out architecture is propose...A modified extended binary Euclid＇ s algorithm which is more regularly iterative for computing an inversion in GF（2^m） is presented. Based on above modified algorithm, a serial-in serial-out architecture is proposed. It has area complexity of O（m）, latency of 5m - 2, and throughput of 1/m. Compared with other serial systolic arehiteetures, the proposed one has the smallest area complexity, shorter latency. It is highly regular, modular, and thus well suited for high-speed VLSI design.展开更多
Introduced a Web-based real-time network monitoring and control system design methods, the 3-D VR was applied in a remote monitor system based on browser/server structure, and a VRML and Java based 3-D remote monitor ...Introduced a Web-based real-time network monitoring and control system design methods, the 3-D VR was applied in a remote monitor system based on browser/server structure, and a VRML and Java based 3-D remote monitor system was realized. Meanwhile, give possible solutions of the real-time data transmission and the stability of the system.展开更多
基金Supported by Inner Mongolia Natural Science Fund(20080404MS0507)National Natural Science Fund(30660150)+1 种基金Education Ministry Higher Education School Science Innovation Project Major Program Cultivation Fund Program(707014)Inner Mongolia Natural Scientific Fund Major Program(200607010501)~~
文摘[Objective] The aim was to set up a plant digital information retrieval system.[Method] Plant digital information retrieval system was designed by combining with Microsoft Visual Basic 6.0 Enterprise Edition database management system and Structure Query Language.[Result] The system realized electronic management and retrieval of local plant information.The key words of retrieval included family,genus,formal name,Chinese name,Latin,morphological characteristics,habitat,collection people,collection places,and protect class and so on.[Conclusion] It provided reference for these problems of species identification and digital management of herbarium.
文摘The application of virtual reality technology has become more and more influential in garden design. Quest3D as a significant software to realize the virtual reality technology is utilized in this study to make a garden roaming demonstration system with the gardening design of a classical courtyard as an example. Besides, the advantages and disadvantages of applying Quest3D technology in garden landscape design are elaborated from the perspective of the selection of Quest3D technology, basic procedures for the selection and establishment of software and hardware.
基金Shanghai Municipal Science Committee key project(061612058,06JC14066,06DZ12001,061111006)Nationalscience and technology supporting project(2006BAF01A46)
文摘According to the necessity of flexible workflow management system, the solution to set up the visualized workflow modelling system based on B/S structure is put forward, which conforms to the relevant specifications of WfMC and the workflow process definition meta-model. The design for system structure is presented in detail, and the key technologies for system implementation are also introduced. Additionally, an example is illustrated to demonstrate the validity of system.
文摘The implementation method of the IEEE 802.11 Medium Access Control (MAC) protocol is mainly based on DSP (Digital Signal Processor)/ ARM (Advanced Reduced instruction set computer Machine) processor or DSP/ARM IP (Intellectual Property) core. This paper presents a method based on Nios II soft-core processor embedded in Altera’s Cyclone FPGA (Field Programmable Gate Array) and MicroC/OS-II RTOS (Real-Time Operation System). The benefits and drawbacks of above methods are compared, and then the method presented in this paper is described. The hardware and software partitioning are discussed; the hardware architecture is also illustrated and the MAC software programming is described in detail. The presented method has some advantages, such as low cost, easy-implementation and very suitable for the implementation of IEEE 802.11 MAC in research stage.
基金Supported by the National Natural Science Foundation of China(No.61076101,61204092,61306033)
文摘Focusing on the linearity shortcoming on a bipolar low noise amplifier(LNA),a new 6 ~14GHz four stage SiGe HBT LNA is proposed.This amplifier adopts a method of gain allocation on multiple stages to avoid the limitation on linearity especially with the addition of negative gain on the third stage.To realize gain flatness,extra zero is introduced to compensate the gain roll-off formed by pole,and local shunt-shunt negative feedback is used to widen the bandwidth as well as optimize circuit' s noise.Simulated results have shown that in 6 ~14GHz,this circuit achieves noise figure(NF) less than 3dB,gain of 17.8dB(+0.2dB),input and output reflection parameters of less than- 10 dB,and the K factor is above 1.15.
文摘A single Complementary Metal Oxide Semiconductor (CMOS) image sensor based on 0.35μm process along with its design and implementation is introduced in this paper. The pixel ar-chitecture of Active Pixel Sensor (APS) is used in the chip,which comprises a 256×256 pixel array together with column amplifiers,scan array circuits,series interface,control logic and Analog-Digital Converter (ADC). With the use of smart layout design,fill factor of pixel cell is 43%. Moreover,a new method of Dynamic Digital Double Sample (DDDS) which removes Fixed Pattern Noise (FPN) is used. The CMOS image sensor chip is implemented based on the 0.35μm process of chartered by Multi-Project Wafer (MPW). This chip performs well as expected.
文摘New methodologies for l-Bit XOR-XNOR full- adder circuits are proposed to improve the speed and power as these circuits are basic building blocks for ALU circuit implementation. This paper presents comparative study of high-speed, low-power and low voltage full adder circuits. Simulation results illustrate the superiority of the proposed adder circuit against the conventional complementary metal-oxide-semiconductor （CMOS）, complementary pass-transistor logic （CPL）, TG, and Hybrid adder circuits in terms of delay, power and power delay product （PDP）. Simulation results reveal that the proposed circuit exhibits lower PDP and is more power efficient and faster when compared with the best available 1-bit full adder circuits. The design is implemented on UMC 0.18 μm process models in Cadence Virtuoso Schematic Composer at 1.8 V single ended supply voltage and simulations are carried out on Spectre S.
文摘According to Marx, man is the sum of all social relationships. Social relationships are interpersonal communication, and realizing good interpersonal communication is all that social people desire. Analyzing the significance and effect of image design （impression management） in interpersonal communication is the best way to strengthen our emphasis on image design and to make good use of image design and to achieve personal dream with real social integration.
文摘This paper used the virtual reality modeling language （VRML） to establish the 3D virtual experiment instrument model, and by using the visual programming language VB to design and develop a interactive virtual realization experiment platform, the interface has friendly interface, stable operation, strong practicability like with the Windows style, is a kind of reform for the traditional physics experiment teaching mode. The system has practical use value, also has reference value for the reform and modernization of other experimental courses.
文摘With the advent of the information age, people＇ s lives have been changed unknowingly owing to lots of modem technology means. For the environmental artistic design, the traditional mode of environmental artistic design is broken through after the emergence of computer technology and virtual reality technique, which makes the scheme and application of virtual reality technique in environmental artistic design to own more practical value. In this paper, the virtual reality technique and its practical application in environmental artistic design are set forth, and the profound influence on the actual design by the virtual reality technique is studied with expectation of enlightenment for broadening the thought of environmental artistic design.
文摘A modified extended binary Euclid＇ s algorithm which is more regularly iterative for computing an inversion in GF（2^m） is presented. Based on above modified algorithm, a serial-in serial-out architecture is proposed. It has area complexity of O（m）, latency of 5m - 2, and throughput of 1/m. Compared with other serial systolic arehiteetures, the proposed one has the smallest area complexity, shorter latency. It is highly regular, modular, and thus well suited for high-speed VLSI design.
文摘Introduced a Web-based real-time network monitoring and control system design methods, the 3-D VR was applied in a remote monitor system based on browser/server structure, and a VRML and Java based 3-D remote monitor system was realized. Meanwhile, give possible solutions of the real-time data transmission and the stability of the system.
