A single poly EEPROM cell circuit sharing the deep N-well of a cell array was designed using the logic process. The proposed cell is written by the FN tunneling scheme and the cell size is 41.26 μm2, about 37% smalle...A single poly EEPROM cell circuit sharing the deep N-well of a cell array was designed using the logic process. The proposed cell is written by the FN tunneling scheme and the cell size is 41.26 μm2, about 37% smaller than the conventional cell. Also, a small-area and low-power 512-bit EEPROM IP was designed using the proposed cells which was used for a 900 MHz passive UHF RFID tag chip. To secure the operation of the cell proposed with 3.3 V devices and the reliability of the used devices, an EEPROM core circuit and a DC-DC converter were proposed. Simulation results for the designed EEPROM IP based on the 0.18μm logic process show that the power consumptions in read mode, program mode and erase mode are 11.82, 25.15, and 24.08 ~tW, respectively, and the EEPROM size is 0.12 mm2.展开更多
In the last years, architectural practice has been confronted with a paradigm shift towards the application of digital methods in design activities. In this regard, it is a pedagogic challenge to provide a suitable co...In the last years, architectural practice has been confronted with a paradigm shift towards the application of digital methods in design activities. In this regard, it is a pedagogic challenge to provide a suitable computational background for architectural students, to improve their ability to apply algorithmic-parametric logic, as well as fabrication and prototyping resources to design problem solving. This challenge is even stronger when considering less favored social and technological contexts, such as in Brazil, for example. In this scenario, this article presents and discusses the procedures and the results from a didactic experience carried out in a design computing-oriented discipline, inserted in the curriculum of a Brazilian architecture course. Hence, this paper shares some design computing teaching experiences and presents some results on computational methods and creative approaches, with a view to contribute to a better understanding about the relations between logical thinking, mathematics and architectural design processes.展开更多
When we make the arts and crafts design, its design means innovative thinking. If we want better apply to the Art Art design, most importantly, it is in logical thinking in the design process as well as image of think...When we make the arts and crafts design, its design means innovative thinking. If we want better apply to the Art Art design, most importantly, it is in logical thinking in the design process as well as image of thinking better together. Logical thinking itself is more rigorous, but the image more focuses on innovative thinking, the only real two together will be able to successfully Arts and Crafts design to lay a good foundation.展开更多
基金Project(10039239) supported by the Industrial Strategic Technology Development Program Funded by the Ministry of Knowledge Economy, Korea
文摘A single poly EEPROM cell circuit sharing the deep N-well of a cell array was designed using the logic process. The proposed cell is written by the FN tunneling scheme and the cell size is 41.26 μm2, about 37% smaller than the conventional cell. Also, a small-area and low-power 512-bit EEPROM IP was designed using the proposed cells which was used for a 900 MHz passive UHF RFID tag chip. To secure the operation of the cell proposed with 3.3 V devices and the reliability of the used devices, an EEPROM core circuit and a DC-DC converter were proposed. Simulation results for the designed EEPROM IP based on the 0.18μm logic process show that the power consumptions in read mode, program mode and erase mode are 11.82, 25.15, and 24.08 ~tW, respectively, and the EEPROM size is 0.12 mm2.
文摘In the last years, architectural practice has been confronted with a paradigm shift towards the application of digital methods in design activities. In this regard, it is a pedagogic challenge to provide a suitable computational background for architectural students, to improve their ability to apply algorithmic-parametric logic, as well as fabrication and prototyping resources to design problem solving. This challenge is even stronger when considering less favored social and technological contexts, such as in Brazil, for example. In this scenario, this article presents and discusses the procedures and the results from a didactic experience carried out in a design computing-oriented discipline, inserted in the curriculum of a Brazilian architecture course. Hence, this paper shares some design computing teaching experiences and presents some results on computational methods and creative approaches, with a view to contribute to a better understanding about the relations between logical thinking, mathematics and architectural design processes.
文摘When we make the arts and crafts design, its design means innovative thinking. If we want better apply to the Art Art design, most importantly, it is in logical thinking in the design process as well as image of thinking better together. Logical thinking itself is more rigorous, but the image more focuses on innovative thinking, the only real two together will be able to successfully Arts and Crafts design to lay a good foundation.
