Cache技术是一种能够减少时延,节省带宽和降低服务器负载的有效方法。文章分析了现有证书服务器中Cache算法和证书系统的结构特性;指出证书缓存的简单替换算法:FIFO(first in first out)和LRU(Least RecentlyUsed),无法提供较高的Cache...Cache技术是一种能够减少时延,节省带宽和降低服务器负载的有效方法。文章分析了现有证书服务器中Cache算法和证书系统的结构特性;指出证书缓存的简单替换算法:FIFO(first in first out)和LRU(Least RecentlyUsed),无法提供较高的Cache命中率。文中提出了一种智能预留控制缓存替换算法,理论分析和仿真数据表明该算法能大大减少访问证书的时间,改善证书管理效率,并有效提高缓存的命中率。展开更多
Helper-thread of a task can hide the memory access time of irregular data on the chip muhi-core processor （CMP）. For constructing a compiler that effectively supports the helper-thread of a task in the multi-core sc...Helper-thread of a task can hide the memory access time of irregular data on the chip muhi-core processor （CMP）. For constructing a compiler that effectively supports the helper-thread of a task in the multi-core scenario based on the last level shared cache, this paper studies its performance stable condi- tions. Unfortunately, there is no existing model that allows extensive investigation of the impact of stable conditions, we present the base of pre-computation that is formalized by our degraded task-pair 〈 T, T＇ 〉 with the helper-thread, and its stable conditions are analyzed. Finally, a novel performance model and a constructing method of pre-computation based on our positive degraded task-pair are proposed. The efficient results are shown by our experiments. If we further exploit memory level parallelism （MLP） for our task-pair, the task-pair 〈 T, T＇ 〉 can reach better performance.展开更多
文摘Cache技术是一种能够减少时延,节省带宽和降低服务器负载的有效方法。文章分析了现有证书服务器中Cache算法和证书系统的结构特性;指出证书缓存的简单替换算法:FIFO(first in first out)和LRU(Least RecentlyUsed),无法提供较高的Cache命中率。文中提出了一种智能预留控制缓存替换算法,理论分析和仿真数据表明该算法能大大减少访问证书的时间,改善证书管理效率,并有效提高缓存的命中率。
文摘Helper-thread of a task can hide the memory access time of irregular data on the chip muhi-core processor （CMP）. For constructing a compiler that effectively supports the helper-thread of a task in the multi-core scenario based on the last level shared cache, this paper studies its performance stable condi- tions. Unfortunately, there is no existing model that allows extensive investigation of the impact of stable conditions, we present the base of pre-computation that is formalized by our degraded task-pair 〈 T, T＇ 〉 with the helper-thread, and its stable conditions are analyzed. Finally, a novel performance model and a constructing method of pre-computation based on our positive degraded task-pair are proposed. The efficient results are shown by our experiments. If we further exploit memory level parallelism （MLP） for our task-pair, the task-pair 〈 T, T＇ 〉 can reach better performance.
