We propose a novel thermal-conscious power model for integrated circuits that can accurately predict power and temperature under voltage scaling. Experimental results show that the leakage power consumption is underes...We propose a novel thermal-conscious power model for integrated circuits that can accurately predict power and temperature under voltage scaling. Experimental results show that the leakage power consumption is underestimated by 52 % if thermal effects are omitted. Furthermore, an inconsistency arises when energy and temperature are simultaneously optimized by dynamic voltage scaling. Temperature is a limiting factor for future integrated circuits,and the thermal optimization approach can attain a temperature reduction of up to 12℃ with less than 1.8% energy penalty compared with the energy optimization one.展开更多
A novel MOS-only voltage reference is presented,which is based on the threshold voltage difference between p-type and n-type MOSFETs. Its precision is improved by the cancellation of the process variation. The referen...A novel MOS-only voltage reference is presented,which is based on the threshold voltage difference between p-type and n-type MOSFETs. Its precision is improved by the cancellation of the process variation. The reference has been successfully implemented in a Chartered 0.35μm CMOS process. The occupied chip area is 0. 022mm^2. Measurements indicate that without trimming, the average output voltage error is 6mV at room temperature compared with the simulation result. The temperature coefficient is 180ppm/℃ in the worst case in the temperature range of 0 to 100℃ ,and the line regulation is ± 1.1%. The reference is applied in an adaptive power MOSFET driver.展开更多
文摘We propose a novel thermal-conscious power model for integrated circuits that can accurately predict power and temperature under voltage scaling. Experimental results show that the leakage power consumption is underestimated by 52 % if thermal effects are omitted. Furthermore, an inconsistency arises when energy and temperature are simultaneously optimized by dynamic voltage scaling. Temperature is a limiting factor for future integrated circuits,and the thermal optimization approach can attain a temperature reduction of up to 12℃ with less than 1.8% energy penalty compared with the energy optimization one.
文摘A novel MOS-only voltage reference is presented,which is based on the threshold voltage difference between p-type and n-type MOSFETs. Its precision is improved by the cancellation of the process variation. The reference has been successfully implemented in a Chartered 0.35μm CMOS process. The occupied chip area is 0. 022mm^2. Measurements indicate that without trimming, the average output voltage error is 6mV at room temperature compared with the simulation result. The temperature coefficient is 180ppm/℃ in the worst case in the temperature range of 0 to 100℃ ,and the line regulation is ± 1.1%. The reference is applied in an adaptive power MOSFET driver.
