主要探讨了创新的电荷泵轨到轨输入级和 AB 类输出结构的应用。文章首先对整体电路的功能特点进行了详细分析,解释了如何通过各个模块的协同工作实现高效率和高性能。这些模块包括带隙基准模块、振荡器模块、电荷泵模块、主运放模块。...主要探讨了创新的电荷泵轨到轨输入级和 AB 类输出结构的应用。文章首先对整体电路的功能特点进行了详细分析,解释了如何通过各个模块的协同工作实现高效率和高性能。这些模块包括带隙基准模块、振荡器模块、电荷泵模块、主运放模块。每个模块的实现方式和结构都进行了深入探讨,揭示了它们如何共同贡献于整体电路的高效运作。最后,文章通过电路仿真结果验证了所提出设计的有效性,展示了在不同条件下的性能指标,证实了这种设计在实际应用中的可行性和优势。展开更多
A novel general-purpose low-voltage rail-to-rail CMOS （ complementary metal-oxide-semiconductor transistor ） operational amplifier （op-amp）is introduced, which obtains constant transconductance, slew rate and cons...A novel general-purpose low-voltage rail-to-rail CMOS （ complementary metal-oxide-semiconductor transistor ） operational amplifier （op-amp）is introduced, which obtains constant transconductance, slew rate and constant high gain over the entire input common mode voltage range. The proposed scheme has the potential for applications in deep submicrometer technology, as the operation of the circuit does not exclusively rely on the square-law or the linear-law of transistors. The scheme is compact and suitable for applications as VLSI cell. The rail-to- rail op-amp has been implemented in DPDM 0. 6 μm mixedsignal process. The simulations show that in the entire range of input common mode voltage, the variations in transconductance, SR and gain are 1%, 2. 3%, 1.36 dB, respectively. Based on this, the layout and tape-out are carded out. The area of layout is 0. 072 mm^2. The test results are basically consistent with the circuit simulation.展开更多
文摘主要探讨了创新的电荷泵轨到轨输入级和 AB 类输出结构的应用。文章首先对整体电路的功能特点进行了详细分析,解释了如何通过各个模块的协同工作实现高效率和高性能。这些模块包括带隙基准模块、振荡器模块、电荷泵模块、主运放模块。每个模块的实现方式和结构都进行了深入探讨,揭示了它们如何共同贡献于整体电路的高效运作。最后,文章通过电路仿真结果验证了所提出设计的有效性,展示了在不同条件下的性能指标,证实了这种设计在实际应用中的可行性和优势。
文摘A novel general-purpose low-voltage rail-to-rail CMOS （ complementary metal-oxide-semiconductor transistor ） operational amplifier （op-amp）is introduced, which obtains constant transconductance, slew rate and constant high gain over the entire input common mode voltage range. The proposed scheme has the potential for applications in deep submicrometer technology, as the operation of the circuit does not exclusively rely on the square-law or the linear-law of transistors. The scheme is compact and suitable for applications as VLSI cell. The rail-to- rail op-amp has been implemented in DPDM 0. 6 μm mixedsignal process. The simulations show that in the entire range of input common mode voltage, the variations in transconductance, SR and gain are 1%, 2. 3%, 1.36 dB, respectively. Based on this, the layout and tape-out are carded out. The area of layout is 0. 072 mm^2. The test results are basically consistent with the circuit simulation.
