《水力学》气体管路计算例题解法浅析

高教出版社《水力学》教材第六章第五节短管水力计算气体管路的例6—4题,在过流断面的选择与相对压强和绝对压强的关系上,笔者与原题有不同的解法,在此进行粗浅的分析,以供参考.

Preoperative CT radiomics models for predicting composition of in vivo urinary calculi

Objective To observe the value of preoperative CT radiomics models for predicting composition of in vivo urinary calculi.Methods Totally 543 urolithiasis patients were retrospectively enrolled and divided into calcium oxalate monohydrate stone group(group A,n=373),anhydrous uric acid stone group(group B,n=86),carbonate apatite group(group C,n=30),ammonium urate stone group(group D,n=28)and ammonium magnesium phosphate hexahydrate stone group(group E,n=26)according to the composition of calculi,also divided into training set and test set at the ratio of 7∶3.Radiomics features were extracted and screened based on plain CT images of urinary system.Five binary task models(model A—E corresponding to group A—E)and a quinary task model were constructed using least absolute shrinkage and selection operator algorithm for predicting the composition of calculi in vivo.Then receiver operating characteristic curves were drawn,and the area under the curves(AUC)were calculated to evaluate the predictive efficacy of binary task models,while the accuracy,precision,recall and F1 score were used to evaluate the predictive efficacy of the quinary task model.Results All binary task models had good efficacy for predicting the composition of urinary calculi in vivo,with AUC of 0.860—0.948 in training set and of 0.856—0.933 in test set.The accuracy,precision,recall and F1 score of the quinary task model for predicting the composition of in vivo urinary calculi was 82.25%,83.79%,46.23%and 0.596 in training set,respectively,while was 80.63%,75.26%,43.48%and 0.551 in test set,respectively.Conclusion Binary task radiomics models based on preoperative plain CT had good efficacy for predicting the composition of in vivo urinary calculi,while the quinary task radiomics model had high accuracy but relatively poor stability.

Self-supervised learning artificial intelligence noise reduction technology based on the nearest adjacent layer in ultra-low dose CT of urinary calculi

Objective To observe the value of self-supervised deep learning artificial intelligence(AI)noise reduction technology based on the nearest adjacent layer applicated in ultra-low dose CT(ULDCT)for urinary calculi.Methods Eighty-eight urinary calculi patients were prospectively enrolled.Low dose CT(LDCT)and ULDCT scanning were performed,and the effective dose(ED)of each scanning protocol were calculated.The patients were then randomly divided into training set(n=75)and test set(n=13),and a self-supervised deep learning AI noise reduction system based on the nearest adjacent layer constructed with ULDCT images in training set was used for reducing noise of ULDCT images in test set.In test set,the quality of ULDCT images before and after AI noise reduction were compared with LDCT images,i.e.Blind/Referenceless Image Spatial Quality Evaluator(BRISQUE)scores,image noise(SD ROI)and signal-to-noise ratio(SNR).Results The tube current,the volume CT dose index and the dose length product of abdominal ULDCT scanning protocol were all lower compared with those of LDCT scanning protocol(all P<0.05),with a decrease of ED for approximately 82.66%.For 13 patients with urinary calculi in test set,BRISQUE score showed that the quality level of ULDCT images before AI noise reduction reached 54.42%level but raised to 95.76%level of LDCT images after AI noise reduction.Both ULDCT images after AI noise reduction and LDCT images had lower SD ROI and higher SNR than ULDCT images before AI noise reduction(all adjusted P<0.05),whereas no significant difference was found between the former two(both adjusted P>0.05).Conclusion Self-supervised learning AI noise reduction technology based on the nearest adjacent layer could effectively reduce noise and improve image quality of urinary calculi ULDCT images,being conducive for clinical application of ULDCT.

Adaptive Layout Partitioning for Dark Field Alternating Phase-Shift Mask Design

A new partitioning methodology is presented to accelerate 130nm and beyond large scale alternating phase shift mask(Alt PSM) design flow.This method deals with granularity self adaptively.Phase conflicts resolution approaches are described and strategies guaranteeing phase compatible during layout compaction are also discussed.An efficient CAD prototype for dark field Alt PSM based on these algorithms is implemented.The experimental results on several industry layouts show that the tool can successfully cope with the rapid growth of phase conflicts with good quality and satisfy lower resource consumption with different requirements of precision and speedup.

Three-dimensional calculation of roadway earthwork volume

To solve the inaccuracy problem caused by the two existing methods (averageend-area method and prismoidal method) used for the calculation of roadway earthwork volume, thispaper puts forward a new concept of the 3-dimensional algorithm that takes all the roadway geometricdesign procedures as a kind of geometrical operation between the ground model (original terrainmodel) and the roadway model (designed model) under certain constraints, and then presents acomplete 3-dimensional algorithm of roadway earthwork volume as well as its executable computerprogram. The algorithm benefits from the re-triangulation technique of constrained delaunaytriangulation (CDT), which can yield a true volume value theoretically. Through a number ofpractical testscovering varied intervals between adjacent cross sections, it is proven to possess ahigher accuracy compared with that of traditional methods. All the work involved in this paperindicates that the 3-dimensional calculation of roadway earthwork volumeis feasible, more accurateand should have further application in practice.

A Novel Multi-Functional Leakage Current Protector IC Design

A novel type of leakage current protector chip,implemented in the mixed-signal 0.6μm CMOS process,is presented. This chip has the advantages of low power dissipation （10mW）, accurate protection control based on digital response delay time and integration of multi-functions such as leakage current/over-voltage/over-load detection and protection,auto switch-on and so forth. Additionally, the chip is programmable to suit different three-level protection applications with a high anti-interference ability.

Research on the Current Status, Paths and Countermeasures of Family Farm Development in China——Investigation and Analysis of Hubei Province

The Chinese family farm is the most important new micro subject in the construction and development of modern agriculture in China. The investigation and analysis of the actual situation of Hubei Province showed that since the implementation of the household contract management system in rural areas, the family farm has followed the track of gradual development, breakthrough development and normal standardization development. In order to promote the family farm to develop rapidly, orderly and healthily, work must be well done to land circulation, scale management, financial support, financial subsidy, cultivation of leading talents and professional farmers, and providing all-round services.

An enhanced iterative joint channel estimation and symbol detection algorithm for OFDM systems

For orthogonal frequency division multiplexing (OFDM) wireless communication, the system throughput and data rate are usually limited by pilots, especially in a high mobility environment. In this paper, an enhanced iterative joint channel estimation and symbol detection algorithm is proposed to enhance the system throughput and data rate. With lower pilot power, the proposed scheme increases system throughput firstly, and then the channel estimation and symbol detection proceed iteratively within one OFDM symbol to improve the BER performance. In the proposed algorithm, the original channel estimate of each OFDM symbol is based on the channel estimate of the previous OFDM symbol, thus the variation of the mobile channel is traced efficiently, so the number of pilots in the time domain can be reduced greatly. Besides reducing the system overhead, the proposed algorithm is also shown by simulation to give much better BER performance than the conventional iterative algorithm does.

Design of a CMOS Current-Adjustable Charge-Pump Circuit Insensitive to Power Supply and Temperature

A CMOS charge-pump circuit with adjustable current is presented.A bandgap voltage reference,a low drop-out regulator,and a capacitive DC-DC voltage-booster are used to generate supply voltage for the current reference.This generated voltage is insensitive to the changes of external power supply voltage and temperature,while the current reference itself is insensitive to temperature.The circuit is designed in 0.18μm 1.8V standard digital CMOS process.The simulated results show that the performance of the circuit is satisfied.

Study on the Design Criteria for Prestressed Concrete Pavements

With a concrete pavement slab prestressed, its load carrying capacity can be significantly increased; thus a thinner slab may be used for the same loading. Prestressing modify the structural behavior of the pavement slab and there is a greater resistance to impact, vibration and overloading. This paper discusses the major design considerations necessary in the successful construction of prestressed concrete pavements and presents a design procedure developed to predict the compressive stress due to prestressing in the pavements at early stage, during service and after cracking. Variation in the approach for repetitive and nonrepetitive loads is clearly distinguished. Check on the recovery after cracking for overloading in prestressed pavements is also needed. Finally, a design example is illustrated the application of the approach developed.

Optimal Stack Generation for CMOS Analog Modules with Parasitic and Mismatch Constraints

The performances of analog circuits depend greatly on the layout parasitics and mismatches.Novel techniques are proposed for modeling the distributed parasitic capacitance,parasitic parameter mismatch due to process gradient and the inner stack routing mismatch.Based on the proposed models,an optimal stack generation technique is developed to control the parasitics and mismatches,optimize the stack shape and ensure the generation of an Eulerian graph for a given CMOS analog module.An OPA circuit example is given to demonstrate that the circuit performances such as unit gain bandwidth and phase margin are enhanced by the proposed layout optimization method.

Investigation of cost-effectiveness of highway asphalt pavement maintenance treatments based on rutting development analysis

To investigate the cost-effectiveness of different maintenance treatments of highways in Jiangsu Province, the historical pavement maintenance records, traffic load information and pavement performance data in the pavement management system （PMS） are recorded and analyzed. Compared with the growth model, the linear model, the logarithm model and the exponential model, the cubic model has higher regression accuracy R2 and it can capture the sigmoid shape of the deterioration curve. So it is selected to simulate the pavement rotting development. The benefit over cost ratio is calculated to quantify the treatment cost- effectiveness. The analysis results show that thin hot mix asphalt （HMA） overlays and micro surfacing are more cost- effective than the. other two treatments on light and moderate traffic roads. Hot in-place recycling and thick HMA overlays have much longer service lives and greater cost-effectiveness under heavy or extra heavy traffic.

Design of Aided Decision-Making Program for Prioritizing Construction Projects in Urban Road Network Planning

The importance and complexity of prioritizing construction projects (PCP) in urban road network planning lead to the necessity to develop an aided decision making program (ADMP). Cost benefit ratio model and stage rolled method are chosen as the theoretical foundations of the program, and then benefit model is improved to accord with the actuality of urban traffic in China. Consequently, program flows, module functions and data structures are designed, and particularly an original data structure of road ...

Top-Down Design of 260k Color TFT-LCD One-Chip Driver ICs

A top-down design methodology is proposed for the design of TFT-LCD one-chip driver ICs,and a 260k color, 176RGB× 220-dot TFT-LCD one-chip driver IC is successfully developed with silicon verification. This IC is a typical mixed-signal VLSI and is implemented by a 0.18μm HV CMOS process. The static power dissipation is about 5mW for 260k color display mode,and the settling time of the output grayscale voltages within 0.2% error is less than 26μs.

Optimum Design of Impedance Simulator for Phased Array Antnnas

The impedance of a solid state active phased array antenna varing with frequency and beam scanning scanning angle be matched with the solid state active matching network (SSAMN). In order to adjust and measure the radar conveniently and Securely, it is necessary for the impedance of the simulator of the phased array antennas to be optimized.Having selected the PIN dilde controlling circuits and the circuit parameters optimized,the simulator circuit is determined through numerical computation The experiment is given in support of the simulation.

Dissociation Pathway Analysis of Thymine under Low Energy VUV Photon Excitation

Photon-induced dissociation pathways of thymine are investigated with vacuum ultraviolet photoionization mass spectrometry and theoretical calculations. The photoionization mass spectra of thymine at different photon energy are measured and presented. By selecting suitable photon energy, exclusively molecular ion m/z=126 is obtained. At photon energy of 12.0 eV, the major ionic fragments at m/z=98, 97, 84, 83, 70, and 55 are obtained, which are assigned to C4H6N2O＋, C4H5N2O＋, C3H4N2O＋ （or C4H6NO＋）, C4H5NO＋, C2NO2＋, and C3H5N＋, respectively. With help of theoretical calculations, the detailed dissociation pathways of thymine at low energy are well established.

Optimization of Global Signal Networks for Island-Style FPGAs

We present a staggered buffer connection method that provides flexibility for buffer insertion while designing global signal networks using the tile-based FPGA design methodology. An exhaustive algorithm is used to analyze the trade-off between area and speed of the global signal networks for this staggered buffer insertion scheme, and the criterion for determining the design parameters is presented. The comparative analytic result shows that the methods in this paper are proven to be more efficient for FPGAs with a large array size.

Design of 1GHz Local Oscillator with DLL -Based Frequency Multiplier Technique

A new method of synthesizing 1GHz based on a 0 5μm CMOS D LL is proposed,which can synthesize frequency with simple logic and amplifiers.T he designed frequency synthesizer consists of a DLL (Delay-Locked Loop) and a b uilding block of synthesizing logic.The reference frequency input into this freq uency synthesizer is 25MHz and the synthesized frequency is 1GHz.

Design and Experimental Study of an 80C196KC-Based SRD System Controller

Aim To design and experimentally study an 80C196KC-based SRD (switched re- luctance motor drive drive sytem) controller,Methods with the guidelines of the digitized SRD system controller,the circuit design and software programming were completed,and a relevantexperimental system was PUT forward to test the newly designed controller.Result The experi-mental study showed that the newlydesigned controller had good speed-adjusting characteristicfor a switched reluctance motor ,its stable error was less than 5% and its full-load startingtime was shorter than 1.8s .Conclusion The new controller has reasonable circuit design and suitable controlling algorithm,and it is a feasible SRD system controller design scheme.

Performance of Physical-Layer Network Coding in Asymmetric Two-Way Relay Channels

In this paper, we study the performance of physical-layer network coding in asymmetric two-way relay channels using four different cases having different poor channels:phase asymmetry, downlink asymmetry, uplink asymmetry and node asymmetry. The decision and mapping rule for symmetric and asymmetric cases are studied. The performance in terms of bit error rate for each case will be studied and analysed by computer simulation. Analytical and simulation results show that uplink asymmetry is the worst case;intra-phase asymmetry and unreliable uplink channels will more severely affect the performance degradation, which is caused by channel asymmetry.