The hardware optimization technique of mono similarity system generation is presented based on hardware/software(HW/SW) co design.First,the coarse structure of sub graphs' matching based on full customized HW...The hardware optimization technique of mono similarity system generation is presented based on hardware/software(HW/SW) co design.First,the coarse structure of sub graphs' matching based on full customized HW/SW co design is put forward.Then,a universal sub graphs' combination method is discussed.Next,a more advanced vertexes' compression algorithm based on sub graphs' combination method is discussed with great emphasis.Experiments are done successfully with perfect results verifying all the formulas and the methods above.展开更多
In order to improve the efficiency of embedded software running on processor core, this paper proposes a hard-ware/software co-optimization approach for embedded software from the system point of view. The proposed st...In order to improve the efficiency of embedded software running on processor core, this paper proposes a hard-ware/software co-optimization approach for embedded software from the system point of view. The proposed stepwise methods aim at exploiting the structure and the resources of the processor as much as possible for software algorithm optimization. To achieve low memory usage and low frequency need for the same performance, this co-optimization approach was used to optimize embedded software of MP3 decoder based on a 16-bit fixed-point DSP core. After the optimization, the results of decoding 128 kbps, 44.1 kHz stereo MP3 on DSP evaluation platform need 45.9 MIPS and 20.4 kbytes memory space. The optimization rate achieves 65.6% for memory and 49.6% for frequency respectively compared with the results by compiler using floating-point computation. The experimental result indicates the availability of the hardware/software co-optimization approach depending on the algorithm and architecture.展开更多
文摘The hardware optimization technique of mono similarity system generation is presented based on hardware/software(HW/SW) co design.First,the coarse structure of sub graphs' matching based on full customized HW/SW co design is put forward.Then,a universal sub graphs' combination method is discussed.Next,a more advanced vertexes' compression algorithm based on sub graphs' combination method is discussed with great emphasis.Experiments are done successfully with perfect results verifying all the formulas and the methods above.
基金Project supported by the Key-Tech Program of Zhejiang Province,China (No. 021101559), and the Fok Ying Tong Education Founda-tion (No. 94031), China
文摘In order to improve the efficiency of embedded software running on processor core, this paper proposes a hard-ware/software co-optimization approach for embedded software from the system point of view. The proposed stepwise methods aim at exploiting the structure and the resources of the processor as much as possible for software algorithm optimization. To achieve low memory usage and low frequency need for the same performance, this co-optimization approach was used to optimize embedded software of MP3 decoder based on a 16-bit fixed-point DSP core. After the optimization, the results of decoding 128 kbps, 44.1 kHz stereo MP3 on DSP evaluation platform need 45.9 MIPS and 20.4 kbytes memory space. The optimization rate achieves 65.6% for memory and 49.6% for frequency respectively compared with the results by compiler using floating-point computation. The experimental result indicates the availability of the hardware/software co-optimization approach depending on the algorithm and architecture.
