The three-phase bridge inverter is used as the converter topology in the power controller for a 9 kW doubly salient permanent magnet （DSPM） motor. Compared with common three-phase bridge inverters, the proposed inve...The three-phase bridge inverter is used as the converter topology in the power controller for a 9 kW doubly salient permanent magnet （DSPM） motor. Compared with common three-phase bridge inverters, the proposed inverter works under more complicated conditions with different principles for special winding back EMFs, position signals of hall sensors, and the given mode of switches. The ideal steady driving principles of the inverter for the motor are given. The working state with asymmetric winding back EMFs, inaccurate position signals of hall sensors, and the changing input voltage is analyzed. Finally, experimental results vertify that the given anal ysis is correct.展开更多
An input-output signal selection based on Phillips-Heffron model of a parallel high voltage alternative current/high voltage direct current(HVAC/HVDC) power system is presented to study power system stability. It is w...An input-output signal selection based on Phillips-Heffron model of a parallel high voltage alternative current/high voltage direct current(HVAC/HVDC) power system is presented to study power system stability. It is well known that appropriate coupling of inputs-outputs signals in the multivariable HVDC-HVAC system can improve the performance of designed supplemetary controller. In this work, different analysis techniques are used to measure controllability and observability of electromechanical oscillation mode. Also inputs–outputs interactions are considered and suggestions are drawn to select the best signal pair through the system inputs-outputs. In addition, a supplementary online adaptive controller for nonlinear HVDC to damp low frequency oscillations in a weakly connected system is proposed. The results obtained using MATLAB software show that the best output-input for damping controller design is rotor speed deviation as out put and phase angle of rectifier as in put. Also response of system equipped with adaptive damping controller based on HVDC system has appropriate performance when it is faced with faults and disturbance.展开更多
Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementat...Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementation of LVDS Input/Output (I/O) interface circuits in a standard 0.18 μm CMOS technology using thick gate oxide devices (3.3 V), fully compatible with LVDS standard. In the proposed transmitter, a novel Common-Mode FeedBack (CMFB)circuit is utilized to keep the common-mode output voltage stable over Process, supply Voltage and Temperature (PVT) variations. Because there are no area greedy resistors in the CMFB circuitry, the disadvantage of large die area in existing transmitter structures is avoided. To obtain sufficient gain, the receiver consists of three am- plifying stages: a voltage amplifying stage, a transconductance amplifying stage, and a transimpedance amplifying stage. And to exclude inner nodes with high RC time constant, shunt-shunt negative feedback is introduced in the receiver. A novel active inductor shunt peaking structure is used in the receiver to fulfill the stringent requirements of high speed and wide Common-Mode Input Region (CMIR) without voltage gain, power dissipation and silicon area penalty. Simulation results show that data rates of 2 Gbps and 2.5 Gbps are achieved for the transmitter and receiver with power con- sumption of 13.2 mW and 8.3 mW respectively.展开更多
文摘The three-phase bridge inverter is used as the converter topology in the power controller for a 9 kW doubly salient permanent magnet （DSPM） motor. Compared with common three-phase bridge inverters, the proposed inverter works under more complicated conditions with different principles for special winding back EMFs, position signals of hall sensors, and the given mode of switches. The ideal steady driving principles of the inverter for the motor are given. The working state with asymmetric winding back EMFs, inaccurate position signals of hall sensors, and the changing input voltage is analyzed. Finally, experimental results vertify that the given anal ysis is correct.
文摘An input-output signal selection based on Phillips-Heffron model of a parallel high voltage alternative current/high voltage direct current(HVAC/HVDC) power system is presented to study power system stability. It is well known that appropriate coupling of inputs-outputs signals in the multivariable HVDC-HVAC system can improve the performance of designed supplemetary controller. In this work, different analysis techniques are used to measure controllability and observability of electromechanical oscillation mode. Also inputs–outputs interactions are considered and suggestions are drawn to select the best signal pair through the system inputs-outputs. In addition, a supplementary online adaptive controller for nonlinear HVDC to damp low frequency oscillations in a weakly connected system is proposed. The results obtained using MATLAB software show that the best output-input for damping controller design is rotor speed deviation as out put and phase angle of rectifier as in put. Also response of system equipped with adaptive damping controller based on HVDC system has appropriate performance when it is faced with faults and disturbance.
文摘Low Voltage Differential Signaling (LVDS) has become a popular choice for high-speed serial links to conquer the bandwidth bottleneck of intra-chip data transmission. This paper presents the design and the implementation of LVDS Input/Output (I/O) interface circuits in a standard 0.18 μm CMOS technology using thick gate oxide devices (3.3 V), fully compatible with LVDS standard. In the proposed transmitter, a novel Common-Mode FeedBack (CMFB)circuit is utilized to keep the common-mode output voltage stable over Process, supply Voltage and Temperature (PVT) variations. Because there are no area greedy resistors in the CMFB circuitry, the disadvantage of large die area in existing transmitter structures is avoided. To obtain sufficient gain, the receiver consists of three am- plifying stages: a voltage amplifying stage, a transconductance amplifying stage, and a transimpedance amplifying stage. And to exclude inner nodes with high RC time constant, shunt-shunt negative feedback is introduced in the receiver. A novel active inductor shunt peaking structure is used in the receiver to fulfill the stringent requirements of high speed and wide Common-Mode Input Region (CMIR) without voltage gain, power dissipation and silicon area penalty. Simulation results show that data rates of 2 Gbps and 2.5 Gbps are achieved for the transmitter and receiver with power con- sumption of 13.2 mW and 8.3 mW respectively.
