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微处理器设计中提高访存效率的一种方法 被引量:5
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作者 马婉良 高德远 张盛兵 《西北工业大学学报》 EI CAS CSCD 北大核心 1999年第3期338-343,共6页
低效率的访存操作是限制微处理器性能提高的一个关键因素。本文提出了一种 Load/ Store 缓冲模型,分析了这种模型协调微处理器和存储器之间速度差异的作用和提高访存效率的机理,讨论了适合于 I C设计的四种实现方案,并... 低效率的访存操作是限制微处理器性能提高的一个关键因素。本文提出了一种 Load/ Store 缓冲模型,分析了这种模型协调微处理器和存储器之间速度差异的作用和提高访存效率的机理,讨论了适合于 I C设计的四种实现方案,并且在微处理器 N R S4000 的设计中得到应用,取得了良好的效果。 展开更多
关键词 微处理器 FIFO 设计 访存效率 输入输出子系统
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AN ITERATIVE PARTICLE FILTER SIGNAL DETECTOR FOR MIMO FAST FADING CHANNELS
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作者 Yang Tao Hu Bo 《Journal of Electronics(China)》 2008年第2期157-165,共9页
For flat fast fading Multiple-Input Multiple-Output(MIMO) channels,this paper presents a sampling based channel estimation and an iterative Particle Filter(PF) signal detection scheme. The channel estimation is compri... For flat fast fading Multiple-Input Multiple-Output(MIMO) channels,this paper presents a sampling based channel estimation and an iterative Particle Filter(PF) signal detection scheme. The channel estimation is comprised of two parts:the adaptive iterative update on the channel distribution mean and a regular update on the "adaptability" via pilot. In the detection procedure,the PF is employed to produce the optimal decision given the known received signal and the sequence of the channel samples,where an asymptotic optimal importance density is constructed,and in terms of the asymptotic update order,the Parallel Importance Update(PIU) and the Serial Importance Update(SIU) scheme are performed respectively. The simulation results show that for the given fading channel,if an appropriate pilot mode is selected,the proposed scheme is more robust than the conventional Kalman filter based superimposed detection scheme. 展开更多
关键词 Multiple-Input Multiple-Output Update (PIU) Serial Importance Update (SIU) (MIMO) Particle Filter (PF) Parallel Importance
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