鲜莲子通芯机的设计与试验

莲子广泛种植于中国,传统的鲜莲子去芯都是手工加工,费时费力。鲜莲子头尾有别,只有从莲子的头部去芯才能得到完整的莲芯,这给鲜莲子去芯机械带来了非常大的困难。为解决鲜莲子去芯难的问题,设计了一种鲜莲子通芯机,利用槽轮机构实现机构的间歇运动,通过进料装置进行逐个进料,夹持机构夹紧莲子,磁力牵引装置驱动滚轮旋转使得莲子方向定正,利用色标传感器进行头尾识别,识别后气缸驱动空心针以及集芯管相向运动,从而使得莲子前后夹紧,同时电磁水阀打开,高压水将莲芯完整地冲出到集芯管,完成去芯作业后,机器运转到落料工位自动落料,从而实现进料落料一体化加工,极大地减轻了劳动强度。试验结果表明:该机作业性能稳定,通芯率、损伤率、吨料电耗和生产率平均值分别为91.0%、2.2%、46.4 kW·h/t、25.3 kg/h。总体来说,该机适用于莲子通芯的机械化作业。

莲子通芯机研究现状与展望

随着莲子需求不断增加,传统的手工、半机械莲子去芯已不能满足市场的需求,这也加快了莲子通芯机的研究发展。通过介绍近年来人们对莲子通芯机的研究现状及几种典型的莲子通芯设备,归纳了莲子通芯存在的问题,为莲子通芯向机械化智能化发展提供参考。

白莲通芯机械发展研究

通芯白莲品质优良,营养丰富、药用价值高,是传统的滋补保健食品。近年来,随着白莲需求的不断增加,价格节节升高,各地扩大了种植面积来提高总产量。而由于大量农村劳动力的转移使得白莲加工出现劳动力短缺问题,于是在传统的手工加工方法以外,机械化加工白莲的需求日益提升,这便促进了莲子通芯机械的发展。基于此,本文介绍近年来莲子通芯常用的几种加工方式及几种典型的莲子通芯设备,归纳莲子通芯存在的问题,并对白莲通芯的机械化发展进行分析。

鲜莲子全自动通芯机定位机构设计与研究

为增加莲子通芯机的通芯成功率和降低莲子破损率,设计了全自动通芯机定位机构。莲子定位机构中的弹簧设计能保证不同规格莲子的轴线与钢针轴线保持一致,实现莲子的精准定位。通过定位机构试验,结果表明:最大定位误差小于0.3mm,能够满足通芯机的定位要求。定位机构机械性能稳定,采用定位机构的通芯机能显著提高通芯成功率和通芯效率。

MMU在TD-SCDMA基带专用芯片中的应用

介绍了存储管理单元在TD-SCDMA基带专用芯片“通芯一号”中的工作原理,包括地址转换及高速缓存的控制。在存储管理单元应用实例中,合理地对“通芯一号”物理存储空间进行了重映射,而且成功启动了高速缓存,使“通芯一号”的运行效率大幅度提升,更容易满足3G业务的需求。

湘莲价格走高

最近以来,湖南市场湘莲货源进一步紧俏,价格大幅度走高,开边莲的销售价,每吨已上涨到2.4万元。粒莲每吨上升到2.3万元,通芯莲每吨上涨到3.5万元,壳莲每吨上升到1.3万元,均比去年同期上升80％左右,创历史最高水平。

A low-power high-throughput link splitting router for NoCs

In this paper, we propose a technique for lowering the latency of the communication in a NoC （network on chip）. The technique, which can support two qualities of service （QoS）, i.e., the guaranteed throughput （GT） and best effort （BE）, is based on splitting a wider link into narrower links to increase throughput and decrease latency in the NoC. In addition, to ease the synchronization and reduce the crosstalk, we use the l-of-4 encoding for the smaller buses. The use of the encoding in the proposed NoC architecture considerably lowers the latency for both BE and GT packets. In addition, the bandwidth is increased while the power consumption of the links is reduced.

Analysis and Implementation of Traffic Buffering in EOS Chip Design

The traffic buffering problems in the ethernet over synchronous digital hierarchy(EOS) are introduced and analyzed. Different solutions are also presented in detail. Synchronous DRAM(SDRAM) is used as off-chip buffer to store-and-retransmission ethernet frames. A new and easy control design is introduced here. The buffer area size on chip is greatly reduced and the power dissipation is lowed at the same time.

Real-Time Implementation for Reduced-Complexity LDPC Decoder in Satellite Communication

In this paper,it has proposed a realtime implementation of low-density paritycheck(LDPC) decoder with less complexity used for satellite communication on FPGA platform.By adopting a(2048.4096)irregular quasi-cyclic(QC) LDPC code,the proposed partly parallel decoding structure balances the complexity between the check node unit(CNU) and the variable node unit(VNU) based on min-sum(MS) algorithm,thereby achieving less Slice resources and superior clock performance.Moreover,as a lookup table(LUT) is utilized in this paper to search the node message stored in timeshare memory unit,it is simple to reuse and save large amount of storage resources.The implementation results on Xilinx FPGA chip illustrate that,compared with conventional structure,the proposed scheme can achieve at last 28.6%and 8%cost reduction in RAM and Slice respectively.The clock frequency is also increased to 280 MHz without decoding performance deterioration and convergence speed reduction.

Recycling of AZ91 Mg alloy through consolidation of machined chips by extrusion and ECAP

AZ91 Mg alloy recycled by a solid state process and equal channel angular pressing(ECAP)exhibited a superior strength. The mechanical properties of AZ91 Mg alloy recycled from machined chips by extrusion at 623 K and ECAP at 573 K and 623 K were compared with those of the reference alloy which was produced from an as-received AZ91 Mg alloy block under the same conditions as the recycled alloy.The recycled specimens show a higher strength at room temperature than the reference alloy.The improvement of the tensile properties is attributed not only to the small grain size,but also to the dispersed oxide contaminants.

Design of an unbuffered switch for network on-chip

In the complex multicore chip system,network on-chip(NoC)is viewed as a kind of system interconnection that can substitute the traditional interconnect networks,which will improve the system performance and communication efficiency.With regard to the complex and large scale NoC,simple and efficient routing nodes are the critical factors to achieve low-cost and low-congestion communication performance.This paper proposes an unbuffered switch architecture and makes detailed analysis of the mechanism of buffer in the switch architecture.According to the simulation results,the S-mesh using the unbuffered switch architecture is better in terms of the optimal performance in message latency than some typical NoC architectures,such as 2D-mesh,Fat-tree,Butterfly,Octagon and so on.The synthesis results of design compiler indicate that the unbuffered switch has obvious advantages of achieving cost and operating speed for the chips.

Measurement of the Energy Spectrum of the Neutrons inside the Neutron Flux Trap Assembled in the Center of the Reactor Core IPEN/MB-01

This paper presents the neutron energy spectrum in the central position of a neutron flux trap assembled in the core center of the research nuclear reactor IPEN/MB-01, obtained by an unfolding method. To this end, we have used several different types of activation foils （Au, Sc, Ti, Ni, and plates） which have been irradiated in the central position of the reactor core （setting number 203） at a reactor power level （64.57±2.91 watts）. The activation foils were counted by solid-state detector HPGe （high pure germanium detector） （gamma spectrometry）. The experimental data of nuclear reaction rates （saturated activity per target nucleus） and a neutron spectrum estimated by a reactor physics computer code are the main input data to get the most suitable neutron spectrum in the irradiation position obtained through SANDBP （spectrum analysis neutron detection code-version Budapest University） code： a neutron spectra unfolding code that uses an iterative adjustment method. the integral neutron flux, （2.41 ± 0.01） × 10^9 n·cm^-2·s^-1 for the thermal The adjustment resulted in （3.85 ± 0.14） × 10^9 n·cm^-2·s^-1 for neutron flux, （1.09 ±0.02） × 10^9n·cm^-2·s^-1 for intermediate neutron flux and （3.41 ± 0.02） × 10^8 n·cm^-2·s^-1 for the fast neutrons flux. These results can be used to verify and validate the nuclear reactor codes and its associated nuclear data libraries, besides, show how much effective it can be that the use of a neutron flux trap in the nuclear reactor core to increase the thermal neutron flux without increase the operation reactor power level. The thermal neutral flux increased 4.04 ± 0.21 times compared with the standard configuration of the reactor core.

Realization of band-pass and low-pass filters on a single chip in terahertz regime

In this paper, we present the design, simulation, fabrication and characterization of a terahertz(THz) filter based on metamaterial consisting of the periodical double symmetric splits ring resonator(DS-SRR) array. We can observe that the metamaterial-based filter possesses a band-pass transmission when the electrical field is along y direction, and it possesses a low-pass transmission when the electrical field is along x direction. Our results demonstrate that the proposed filter can realize the switching between band-pass effect and low-pass effect by only changing the polarization direction of the incident electromagnetic wave. Moreover, the calculated surface current distributions are also used to analyze the switchable mechanism of the THz metamatrial filter. Therefore, the proposed THz wave filter has a potential application in THz wave communication systems.

30 W monolithic 2-3 μm supercontinuum laser

A higfi-power all-fiber supercontinuum （SC） laser source based on germania-core fiber （GCF） was presented. The lesser absorption loss of GCF than silica fiber beyond 2.0 μm makes GCF more suitable for extending the SC spectrum to the long wavelength side. In this work, the GCF-based SC laser had a maximum power of 30.1 W, together with a 10 dB spectral bandwidth of 〉 1000 um spanning from 1.95 to 3.0 μm. To the best of our knowledge, this is the highest output power level ever reported for a GCF-based SC laser as well as a 2-3 μm SC laser.

Bionic SERS chip with super-hydrophobic and plasmonic micro/nano dual structure

Natural surface-enhanced Raman spectroscopy （SERS） chips based on plants or insects have gained increased attention due to their facile characteristics and low costs. However, such chips remain a major challenge for practical application because of poor reproducibility and stability as well as unavoidable damage to the surface structure during coating metal and uncontrolled dehydration. By using a simple wrinkling method, we develop a new route to fabricate a low-cost bionic SERS chip for practical detection. Inspired by the taro leaf, we fabricate a SERS chip with a super-hydrophobic and plasmonic micro/nano dual structure, and its structure parameters can be optimized. Compared with the natural taro-leaf SERS chip, our artificial chip exhibits Raman signals with an order of magnitude higher sensitivity （N 10-9 M） and enhancement factor （N 107） under the illumination of weak laser radiation, demonstrating that our SERS chip has great potential in biological detection. The excellent per- formances of our bionic SERS chip are attributed to a synergy of optimized micro-wrinkle and nano-nest, which is verified by experiment and simulation. We believe our bionic chip could be a promising candidate in practical application due to its merits such as simple fabricating process, optimizable structure, low cost, excellent homo- geneity, high sensitivity, and stability.

Single nanoparticle trapping based on on-chip nanoslotted nanobeam cavities

Optical trapping techniques are of great interest since they have the advantage of enabling the direct handling of nanoparticles. Among various optical trapping systems, photonic crystal nanobeam cavities have attracted great attention for integrated on-chip trapping and manipulation. However, optical trapping with high efficiency and low input power is still a big challenge in nanobeam cavities because most of the light energy is confined within the solid dielectric region. To this end, by incorporating a nanoslotted structure into an ultracompact one- dimensional photonic crystal nanobeam cavity structure, we design a promising on-chip device with ultralarge trapping potential depth to enhance the optical trapping characteristic of the cavity. In this work, we first provide a systematic analysis of the optical trapping force for an airborne polystyrene （PS） nanoparticle trapped in a cavity model. Then, to validate the theoretical analysis, the numerical simulation proof is demonstrated in detail by using the three-dimensional finite element method. For trapping a PS nanoparticle of 10 nm radius within the air-slot, a maximum trapping force as high as 8.28 nN/mW and a depth of trapping potential as large as 1.15 × 105 kBTmW-1 are obtained, where kB is the Boltzmann constant and T is the system temperature. We estimate a lateral trapping stiffness of 167.17 pN. nm-1 . mW-1 for a 10 nm radius PS nanoparticle along the cavity x-axis, more than two orders of magnitude higher than previously demonstrated on-chip, near field traps. Moreover, the threshold power for stable trapping as low as 0.087 μW is achieved. In addition, trapping of a single 25 nm radius PS nanoparticle causes a 0.6 nm redshift in peak wavelength. Thus, the proposed cavity device can be used to detect single nanoparticle trapping by monitoring the resonant peak wavelength shift. We believe that the architecture with features of an ultracompact footprint, high integrahility with optical waveguides/cir- cuits, and efficient trapping demonstrated here will provide a promising candidate for developing a lab-on-a-chip device with versatile functionalities.