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小型化锶原子束系统的研制
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作者 付理想 谢玉林 +2 位作者 韩建新 常宏 张首刚 《时间频率学报》 CSCD 2015年第4期201-208,共8页
通过实验完成了对锶原子束锁频系统的小型化研制,系统的长度由85 cm小型化至45 cm,真空腔窗口的直径由35 mm减至16 mm,真空管法兰接口的规格CF35换成了CF16。采用激光诱导荧光的方法测量小型化系统热原子束的原子通量。通过对探测器响... 通过实验完成了对锶原子束锁频系统的小型化研制,系统的长度由85 cm小型化至45 cm,真空腔窗口的直径由35 mm减至16 mm,真空管法兰接口的规格CF35换成了CF16。采用激光诱导荧光的方法测量小型化系统热原子束的原子通量。通过对探测器响应效率的测量,将对荧光功率的测量转化成探测器响应电压的测量。由于原子通量与荧光功率成正比例关系,因此进而得到热原子束的原子通量。实验测得该小型化系统的原子通量满足锶原子光晶格钟实验需求。 展开更多
关键词 锁频系统 原子通量 响应效率 小型化
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Frequency—Locking in Coupled Chaotic Systems
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作者 HUBam-Bi LIUZong-Hua 《Communications in Theoretical Physics》 SCIE CAS CSCD 2001年第4期425-430,共6页
A novel approach is presented for measuring the phase synchronization (frequency-locking) of coupled nonidentical oscillators, which can characterize frequency-locking for chaotic systems without well-defined phase b... A novel approach is presented for measuring the phase synchronization (frequency-locking) of coupled nonidentical oscillators, which can characterize frequency-locking for chaotic systems without well-defined phase by measuring the mean frequency. Numerical simulations confirm the existence of frequency-locking. The relations between the mean frequency and the coupling strength and the frequency mismatch are given. For the coupled hyperchaotic systems, the frequency-locking can be better characterized by more than one mean frequency curves. 展开更多
关键词 frequency-locking mean frequency hyperchaotic system
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A Low Power Dissipation Wide-Band CMOS Frequency Synthesizer for a Dual-Band GPS Receiver
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作者 贾海珑 任彤 +3 位作者 林敏 陈方雄 石寅 代伐 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第10期1968-1973,共6页
This paper presents a wide tuning range CMOS frequency synthesizer for a dual-band GPS receiver,which has been fabricated in a standard 0.18μm RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows ... This paper presents a wide tuning range CMOS frequency synthesizer for a dual-band GPS receiver,which has been fabricated in a standard 0.18μm RF CMOS process. With a high Q on-chip inductor, the wide-band VCO shows a tuning range from 2 to 3.6GHz to cover 2.45 and 3.14GHz in case of process corner or temperature variation,with a current consumption varying accordingly from 0.8 to 0.4mA,from a 1.8V supply voltage. Measurement results show that the whole frequency synthesizer consumes very low power of 5.6mW working at L1 band with in-band phase noise less than - 82dBc/Hz and out-of-band phase noise about - ll2dBc/Hz at 1MHz offset from a 3. 142GHz carrier. The performance of the frequency synthesizer meets the requirements of GPS applications very well. 展开更多
关键词 PLL GPS frequency synthesizer VCO low power CMOS RF
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